XC2287 / XC2286 / XC2285
XC2000 Family Derivatives
Preliminary
Functional Description
3.14
Clock Generation
The Clock Generation Unit can generate the system clock signal fSYS for the XC228x with
high flexibility from several external or internal clock sources.
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External clock signals on pad- or core-voltage level
External crystal controlled by on-chip oscillator
On-chip oscillator (IOSC) for operation without crystal
Wake-up oscillator (ultra-low power) to further reduce power consumption
The programmable on-chip PLL with multiple prescalers generates a clock signal for
maximum system performance from standard crystals or from the on-chip oscillator. See
also Section 4.4.1.
The Oscillator Watchdog (OWD) generates an interrupt if the crystal oscillator frequency
falls below a certain limit or stops completely. In this case, the system can be supplied
with an emergency clock to enable operation even after an external clock failure.
All available clock signals can also be output on one of two selectable pins.
Data Sheet
65
V0.91, 2007-02
Draft Version
INFINEON [ Infineon ]
