TLE 6244X
3.3 Power Con-
sumption
U
≤ 5.5V
A
C
IVDD
IVDD
20
50
mA
mA
VDD
5,5 V < UVDD < 36 V (IC is not
destroyed)
U
U
U
= 14V
= 28V
A
A
A
IUBatt
IUBatt
IUBatt
3
4
1
mA
mA
mA
UBatt
UBatt
UBatt
≤ U
VDD
Power consumption in standby
mode in case of missing U
UBatt
A
IUBatt
200
µA
VDD,
U
≤ 14V
3.4 Inputs of the
Power Stages
and Reset
Outputs are switched off if inputs
are open (parallel control).
IN1...IN16, RST
3.4.1 Low Level
Reset not active,
Power stage on for
i = 1...5, 9...15
i = 6, 7, 16
B
URSTL
1.0
V
B
B
UINiL
UINiL
1.0
1.0
V
V
Power stage off for
i = 8
B
UINiL
1.0
V
3.4.2 High Level
3.4.3 Hysteresis
Power stage off for
i = 1...7, 9...16
B
B
URSTH
UINiH
1.7
2.0
V
V
V
Power stage on for
i = 8
UINiH
B
C
2.0
0.1
V
V
∆UINi
,
0.6
5
∆URST
3.4.4 Input Cur-
rents
-0.3V ≤ UINi,RST ≤ UVDD
A/B
C
IINi,RST -100
µA
µA
µA
(i = 1...7, 9...16)
In, RST
U
VDD ≤ UINi ≤ 36 V
|IINi|
5
(i = 1...7, 9...16)
-0.3V ≤ UIN8 ≤ UVDD
A/B
IIN8
-100
100
0.8V ≤ UIN8 ≤ UVDD, pull down
A
C
IIN8
IIN8
20
20
40
40
100
100
µA
µA
U
VDD ≤ UIN8 ≤ 36 V, pull down
0V ≤ URST ≤ UVDD - 1.7V, pull up
A
A
-IRST
-IINi
20
5
40
10
100
20
µA
µA
0V ≤ UINi ≤ UVDD - 1.7V, pull up
(i = 6,7,16)
Bit BMUX = 1 (CONFIG_REG):
0V ≤ UINi ≤ UVDD - 1.7V, pull up
(i = 1..5, 9..15)
A
A
-IINi
20
40
100
1
µA
µA
Bit BMUX = 0 (CONFIG_REG):
0V ≤ UINi ≤ UVDD, high-impedance
(i = 1..5, 9..15)
|IINi|
Final Data Sheet
45
V4.2, 2003-08-29
INFINEON [ Infineon ]
