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TLD7002-16ES 参数 Datasheet PDF下载

TLD7002-16ES图片预览
型号: TLD7002-16ES
PDF下载: 下载PDF文件 查看货源
内容描述: [The TLD7002-16ES is a 16 channel device with integrated and protected output stages. It is designed to control LEDs with a current up to 76.5 mA as linear current sink (LCS). The power stages can be configured in parallel for higher load currents. Each individual power output stage is configured to a 6-bit current set value stored in the OTP. 16 independent and individual PWM configurations can be set. A high-speed lighting interface is used for device OTP programming, configuration, control and]
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文件页数/大小: 82 页 / 3105 K
品牌: INFINEON [ Infineon ]
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TLD7002-16ES  
Datasheet  
7 Load Diagnostic  
fault management configuration is set to "1" AND  
a load fault is detected in the previous ACTIVE phase  
The reconfirmation cycle starts afer a fault detection by moving the device in the INIT phase with outputs OFF. The  
INIT phase persist for at least treconf time.  
In case of HSLI control, the ACTIVE phase is trigger by a DC_UPDATE command with a delay of treconf. The DC_UPDATE  
command will also clear the fault flags to allow the reconfirmation procedure. Once in ACTIVE phase, a DC_SYNC  
command is needed to turn on only the failing output for ((2 + ndebounce) x PWM period) time.  
In case of direct control via GPIN, the ACTIVE phase is trigger by a GPIN HIGH with a delay of treconf. The fault flags (OL,  
SLS, OVLD) are cleared automatically at the beginning of the treconf. Once in ACTIVE phase only the failing output is  
turned on for ((2 + ndebounce) x PWM period) time in order to reconfirm the load fault. In case the failure is reconfirmed,  
the device moves to the INIT phase again. If the fault condition is not detected during ACTIVE ON, for more than  
(ndebounce x PWM period) time, the device will enable also the other outputs  
The status of the reconfirmation cycle can be checked via HSLI in the reconfirmation status register.  
Note: In an HSLI application (no GPINn activations requests), the load fault shall be read with a READ_OST frame  
before the DC_UPDATE frame.  
Open load on OUT1  
ACTIVE ON  
ACTIVE ON  
OUT1  
OUTn  
ERRn  
OL FLAG  
RECON_FLAG  
RECONFIRMATION CYCLE  
HSLI commands  
DC_SYNC  
DC_SYNC  
READ_OST  
DC_UPDATE  
DC_UPDATE  
DC_SYNC  
Device Status  
ACTIVE  
2+nDebounce PWM  
ACTIVE  
INIT  
treconf  
ACTIVE  
INIT  
treconf  
1+nDebounce PWM  
2+nDebounce PWM  
Normal  
Operation  
OUT1 Open Load  
OUTn Normal Operation  
Normal  
Operation  
Application  
Status  
Figure 14  
Load fault reconfirmation cycle with HSLI  
Datasheet  
40  
Rev.1.00  
2022-05-03  
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