TDA5235
Appendix
Register Description
Field
Bits
Type
Description
Mask Interrupt on "End of Message" for Configuration B
IMEOMB
7
w
0B
1B
Interrupt enabled
Interrupt disabled
Reset: 0H
IMMIDFB
IMFSYNCB
IMWUB
6
5
4
3
2
1
0
w
w
w
w
w
w
w
Mask Interrupt on "Message ID Found" for Configuration B
0B
1B
Interrupt enabled
Interrupt disabled
Reset: 0H
Mask Interrupt on "Frame Sync" for Configuration B
0B
1B
Interrupt enabled
Interrupt disabled
Reset: 0H
Mask Interrupt on "Wake-up" for Configuration B
0B
1B
Interrupt enabled
Interrupt disabled
Reset: 0H
IMEOMA
IMMIDFA
IMFSYNCA
IMWUA
Mask Interrupt on "End of Message" for Configuration A
0B
1B
Interrupt enabled
Interrupt disabled
Reset: 0H
Mask Interrupt on "Message ID Found" for Configuration A
0B
1B
Interrupt enabled
Interrupt disabled
Reset: 0H
Mask Interrupt on "Frame Sync" for Configuration A
0B
1B
Interrupt enabled
Interrupt disabled
Reset: 0H
Mask Interrupt on "Wake-up" for Configuration A
0B
1B
Interrupt enabled
Interrupt disabled
Reset: 0H
Self Polling Mode Active Periods Register
SPMAP
Offset
096H
Reset Value
01H
Self Polling Mode Active Periods Register
ꢀ
ꢈ
ꢄ
ꢁ
8186('
630$3
ꢂ
Z
Data Sheet
239
V1.0, 2010-02-19
INFINEON [ Infineon ]
