TC39x BC/BD-Step
Pin Definition and Functions: LFBGA-516 Package Variant Pin Configuration
Table 2-23 System I/O (cont’d)
Ball
Symbol
Ctrl. Buffer
Type
Function
L21
ESR0
I/O
FAST /
OD /
ESR0 Port Pin input - can be used to trigger a reset or
an NMI
VEXT
ESR0: External System Request Reset 0. Default
configuration during and after reset is open-drain driver.
The driver drives low during power-on reset. This is valid
additionally after deactivation of PORST_N until the
internal reset phase has finished. See also SCU chapter for
details. Default after power-on can be different. See also
SCU chapter ´Reset Control Unit´ and SCU_IOCR register
description. PMS_EVRWUP: EVR Wakepup Pin
PMS_ESR0WKP
PORST
I
ESR0 pin input
M22
I/O
PORST / PORST pin
PD /
Power On Reset Input. Additional strong PD in case of
VEXT
power fail.
Table 2-24 Supply
Ball
Symbol
Ctrl. Buffer
Type
Function
N19, V19,
M18, W18,
W13, V12,
J21, K20
VDD
I
—
Digital Core Power Supply (1.25V)
AJ30, AH29, VEXT
AD25,AC24,
G8, F7, B3,
A2
I
—
External Power Supply (5V / 3.3V)
J10
VFLEX
I
I
—
—
Digital Power Supply for Flex Port Pads (5V / 3.3V)
ADC Analog Power Supply (5V / 3.3V)
AE10, AJ9, VDDM
AK9
A29, B28,
F24, G23
VDDP3
I
I
—
—
Flash Power Supply (3.3V)
Digital Ground
AK30, AJ29, VSS
AE25, AD24,
AB22, AA21,
K10, J9, G7,
B2, A30,
B30, B29,
F25, G24,
J22, K21
AE9, AJ8,
AK8
VSSM
I
—
Analog Ground for VDDM
Data Sheet
170
V 1.2, 2021-03
OPEN MARKET VERSION