TC39x BC/BD-Step
Pin Definition and Functions: LFBGA-516 Package Variant Pin Configuration
Table 2-12 Port 22 Functions (cont’d)
Ball
Symbol
Ctrl. Buffer
Type
Function
Y25
P22.2
I
LVDS_TX General-purpose input
/ FAST /
GTM_TIM7_IN1_1
GTM_TIM1_IN3_7
GTM_TIM0_IN3_7
QSPI4_SLSIB
P22.2
Mux input channel 1 of TIM module 7
PU1 /
VEXT /
ES6
Mux input channel 3 of TIM module 1
Mux input channel 3 of TIM module 0
Slave select input
O0
O1
O2
O3
O4
O5
O6
O7
O
General-purpose output
GTM muxed output
GTM_TOUT49
ASCLIN5_ATX
QSPI4_SLSO3
QSPI4_MTSRN
MSC1_SON
—
Transmit output
Master slave select output
Master SPI data output (LVDS N line)
Data output - inverted part of the differential signal
Reserved
—
Reserved
HSCT1_TXDN
P22.3
Tx data
Y24
I
LVDS_TX General-purpose input
/ FAST /
GTM_TIM7_IN0_1
GTM_TIM1_IN4_4
GTM_TIM0_IN4_4
QSPI4_SCLKB
ASCLIN5_ARXC
P22.3
Mux input channel 0 of TIM module 7
PU1 /
VEXT /
ES6
Mux input channel 4 of TIM module 1
Mux input channel 4 of TIM module 0
Slave SPI clock inputs
Receive input
O0
O1
O2
O3
O4
O5
O6
O7
General-purpose output
GTM muxed output
GTM_TOUT50
—
Reserved
QSPI4_SCLK
QSPI4_MTSRP
MSC1_SOP
—
Master SPI clock output
Master SPI data output (LVDS P line)
Data output - direct part of the differential signal
Reserved
HSPDM_MUTE
Mute output from the micro controller which could be
used to control an external Transmitter
HSCT1_TXDP
O
Tx data
Data Sheet
101
V 1.2, 2021-03
OPEN MARKET VERSION