TC1767
Pinning
3.1.1
TC1767 Pin Configuration: PG-LQFP-176-5
This chapter shows the pin configuration of the package variant PG-LQFP-176-51).
OUT40/OUT8/IN40/IN26/P5.0
OUT41/OUT9/IN41/IN27/P5.1
1
2
132
131
P3.4/OUT88/MTSR0
P3.7/SLSI01/OUT89//SLSO02/SLSO12
OUT42/OUT10/IN42/IN28/P5.2
OUT43/OUT11/IN43/P5.3
3
4
130
129
P3.3/OUT87/MRST0
P3.2/OUT86/SCLK0
OUT44/OUT12/IN44/IN29/P5.4
OUT45/OUT13/IN45/IN30/P5.5
5
6
128
127
P3.8/SLSO06/OUT90/TXD1
P3.6/SLSO01/SLSO11/SLSO01&SLSO11
OUT46/OUT14/IN46/IN31/P5.6
OUT47/OUT15/IN47/P5.7
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
P3.5/SLSO00/SLSO10/SLSO00&SLSO10
VSS
VDDP
VDD
TCLK0/OUT95/P5.15
VDD
VDDP
VSS
ESR0
PORST
ESR1
P1.1/IN17/OUT17/OUT73
TESTMODE
P1.15/BRKIN/BRKOUT
P1.0/IN16/OUT16/OUT72/BRKIN/BRKOUT
TCK/DAP0
TRST
TDO/DAP2/BRKIN/BRKOUT
TMS/DAP1
TDI/BRKIN/BRKOUT
P1.7/IN23/OUT23/OUT79
P1.6/IN22/OUT22/OUT78
P1.5/IN21/OUT21/OUT77
RDATA0B/OUT89/P5.8
RVALID0B/OUT90/P5.9
RREADY0B/OUT91/P5.10
RCLK0B/OUT92/P5.11
TDATA0/SLSO07/OUT93/P5.12
TVALID0B/SLSO16/P5.13
TREADY0B/OUT94/P5.14
VDDP
VDD(SB)
VSS
VDDAF
VDDM F
VSSMF
VFAREF
VFAG ND
AN35
AN34
TC1767
P1.4/IN20/EMGSTOP/OUT20/OUT76
VDDO SC3
VDDO SC
VSSO SC
105
104
AN33
AN32
AN31
AN30
AN29
AN28
30
31
32
33
34
35
103
102
101
100
99
98
XTAL2
XTAL1
VSS
VDDP
V
P1DD.3/IN19/OUT19/OUT75
AN7
AN27
AN26
36
37
38
97
96
95
P1.11/IN27/IN51/SCLK1B/OUT27/OUT51
P1.10/IN26/IN50/OUT26/OUT50/SLSO17
P1.9/IN25/IN49/MRST1B/OUT25/OUT49
AN25
AN24
39
40
94
93
P1.8/IN24/IN48/MTSR1B/OUT24/OUT48
P1.2/IN18/OUT18/OUT74
AN23
AN22
41
42
92
91
V SS
VDDP
AN21
AN20
43
44
90
89
P4.3/IN31/IN55/OUT31/OUT55/EXTCLK0
VDD
MCP06067
Figure 16
TC1767 Pinning for PG-LQFP-176-5
1) TC1767 ED: PG-LQFP-176-6
Data Sheet
53
V1.3, 2009-09
INFINEON [ Infineon ]
