TC1767
Introduction
• Multiplexer test mode (channel 7 input can be connected to ground via a resistor for
test purposes during run time by specific control bit)
• Power saving mechanisms
Features of the digital part of each ADC kernel:
• Independent result registers (16 independent registers)
• 5 conversion request sources (e.g. for external events, auto-scan, programmable
sequence, etc.)
• Synchronization of the ADC kernels for concurrent conversion starts
• Control an external analog multiplexer, respecting the additional set up time
• Programmable sampling times for different channels
• Possibility to cancel running conversions on demand with automatic restart
• Flexible interrupt generation (possibility of DMA support)
• Limit checking to reduce interrupt load
• Programmable data reduction filter by adding conversion results
• Support of conversion data FIFO
• Support of suspend and power down modes
• Individually programmable reference selection for each channel (with exception of
dedicated channels always referring to VAREF
)
Data Sheet
46
V1.3, 2009-09
INFINEON [ Infineon ]
