S29GL01GP
S29GL512P
S29GL256P
S29GL128P
Just prior to the completion of an Embedded Program or Erase operation, DQ7 may change asynchronously with DQ6-DQ0 while
Output Enable (OE#) is asserted low. That is, the device may change from providing status information to valid data on DQ7.
Depending on when the system samples the DQ7 output, it may read the status or valid data. Even if the device has completed the
program or erase operation and DQ7 has valid data, the data outputs on DQ6-DQ0 may be still invalid. Valid data on DQ7-D00
appears on successive read cycles.
See the following for more information: Table , shows the outputs for Data# Polling on DQ7. Figure 7.4, shows the Data# Polling
algorithm; and Figure 11.7, shows the Data# Polling timing diagram.
Figure 7.4 Write Operation Status Flowchart
START
- DQ 6 toggles when programming
- DQ 6 and DQ 2 toggle when erasing
- DQ 2 toggles when erase suspend
- DQ 1 set when program error
Read_1
- DQ 5 set when time out
Read_2
Read_3
DQ6 Toggles between
Read_1 & Read_2
and
Read_1
Read_2
NO
Read_2 & Read_3
YES
NO
WriteBuffer
program and
Read_1 DQ1 is
set
RETURN
WRITE ABORT
RETURN
DONE
YES
DQ2 Toggles
NO
NO
YES
Read_1 DQ5 is
set
RETURN
TIME OUT
YES
RETURN
SUSPEND
Document Number: 002-00886 Rev. *B
Page 32 of 83
INFINEON [ Infineon ]
