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PEB2091NV5.3 参数 Datasheet PDF下载

PEB2091NV5.3图片预览
型号: PEB2091NV5.3
PDF下载: 下载PDF文件 查看货源
内容描述: 集成电路通信( ISDN Echocancellation电路) [ICs for Communications(ISDN Echocancellation Circuit)]
分类和应用: 电信集成电路综合业务数字网通信
文件页数/大小: 299 页 / 1531 K
品牌: INFINEON [ Infineon ]
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PEB 2091  
PEF 2091  
Functional Description  
Table 8  
Setting EOC Mode  
Mode Selection  
Stand-Alone Mode / µP Mode  
EOC Mode  
Transparent  
Automatic  
Pin AUTO/Bit STCR:AUTO  
0
1
function transfers the Monitor Channel into the idle state thereby resolving possible  
lock-up situations. It therefore is to be used in all systems where no µP is capable of  
detecting and solving hang-up situations in the monitor procedure. For a detailed  
description of the time-out procedure see "Monitor Procedure Time-Out", page 80.  
Note 4: The Monitor Channel Time-Out feature is only available after the  
complete receive frame structure has been detected on U (see Figure 30,  
page 81). I.e. this feature is available if the following signals have been  
received:  
In LT modes, the signals SN3 or SN3T  
In NT modes, the signals SL2, SL3, SL3T  
See "U-Interface Signals", page 125 for definition of these signals.  
In stand-alone mode the MTO mode will be set by the input pin MTO. In µP mode the  
MTO mode will be set by bit MTO of register ADF2 (see "ADF2-Register", page 214).  
Table 9  
Setting MTO Mode  
Mode Selection  
Stand-Alone Mode / µP Mode  
MTO Mode  
Pin MTO/Bit ADF2:MTO  
Time-out Enabled  
Time-out Disabled  
01)  
1
1) In stand-alone mode the pin MTO can be left unconnected. Due to an internal pull-down the  
Monitor Channel time-out feature will be enabled.  
3.2.7  
Setting IOM®-2 Bit Clock Mode  
Note 5: This section applies only if the microprocessor mode and the IOM®-2  
Master mode are used (see Note 8, page 70 for definition).  
The default frequency of the IOM®-2 clock DCL will always be two times the bit frequency  
(see Note 7, page 70). In some non standard applications it might be more convenient  
to have IOM®-2 bit rate on DCL, instead. The IEC-Q supports this in the microprocessor  
mode. In this mode it is possible to change the DCL frequency if the IOM®-2 master  
Semiconductor Group  
56  
Data Sheet 01.99