PEB 2091
PEF 2091
Operational Description
PMODE=0
or ACT=1
or TE=0
1
Reset
)
*
D0=0;SG=1
(PMODE=ACT=TE=1)
3
2
(PMODE=ACT=TE=1)
and (BS=SGL=0)
SG to 1
and (BS=CBAC=0)
SG to 0
)
D0=0;SG=1
)
D0=0;SG=0
*
and (SGL=1)
*
BS=1 and SGL=0
and CBAC=0
4a
5a
EOC=25, T4 set
T4 expired
1
SG-4T to 0
D0=0;SG=0
SG-4T to 1
D0=0;SG=1
BS=1 and SGL=0
and CBAC=1
4b
5b
EOC=25, T4 set
T4 expired
SG-4T to 1
D0=0;SG=1
SG-4T to 0
D0=0;SG=0
(BS=SGL=1)
and CBAC=0
1
6
S/G transp.
D0=0;SG=X**)
EOC=25
EOC=27
EOC=27
EOC=25
7
8
S/G transp. 1
D0=0;SG=1
S/G transp. 0
D0=0;SG=0
) Unconditional transition if input combination is met
**) ’X’ = undefined
*
Figure 86
State Machine for S/G Bit Control (part 1)
Semiconductor Group
201
Data Sheet 01.99