PEB 2091
PEF 2091
Operational Description
125 µs
IOM R -2 Frames
INT
1ms
C/I Code INT
INT
0.5 ms
C/I Code INT
ITD10294
Figure 84
4.11
Sampling of Interrupts
S/G Bit and BAC Bit Operations
Note 61: This chapter applies only in the µP-TE mode (see "Setting Operating
Modes", page 50).
If DCL = 1.536 MHz the IOM®-2 interface consists of three IOM®-2 channels (see
"Terminal Timing Mode", page 73). The last octet of an IOM®-2 frame includes the S/G
and the BAC bit. The S/G bit is always written and never read by the IEC-Q. Its value
depends on the last received EOC-command and on the status of the BAC bit. The
processing mode for the S/G bit is selected via bits SWST:BS, SWST:SGL and
ADF:CBAC (see "ADF-Register", page 219). The following table and state machine give
the detailed behavior of the complete S/G bit control function.
Semiconductor Group
198
Data Sheet 01.99
INFINEON [ Infineon ]
