PEB 2091
PEF 2091
Operational Description
4.9
Access to Power Status Pins
This chapter deals with the operational aspects of accessing the power controller
maintenance features provided by the IEC-Q. Pins PS1 and PS2 are available to support
these features. Furthermore, in stand-alone mode pin DISS is also available.
4.9.1
Monitoring Primary and Secondary NT Power Supply
Note 54: This section applies only in NT and TE modes.
Power status bits 1 and 2 (PS1/2) are used to monitor both primary and secondary NT
power supply. This information is transferred via the Single Bits channel to the exchange
side. For information about the Single Bits, see "Single Bits Channel", page 69.
PS1
The primary power supply status bit (bit M42 of the U-frame) is level sensitive. With pin
PS1 set to (1) the overhead bit is set to (1). With pin PS1 set to (0) overhead bit M42 is
set to (0).
PS2
The secondary power supply status bit (bit M43 of the U-frame) is level sensitive. With
pin PS2 set to (1) the overhead bit is set to (1). With pin PS2 set to (0) overhead bit M43
is set to (0).
4.9.2
Monitoring Remote Power Feed Circuit in LT Modes
Note 55: This section applies only in LT modes.
The first power status pin PS1 is used to monitor the remote power feed circuit of the
subscriber line. A high level ’1’ indicates that the remote power has been turned off. In
order to indicate this to the processing unit, the C/I-code "HI" (0011B) will be issued and
the device is reset into the "TEST" state. An existing communication link will break down.
4.9.3
Monitoring Power Feed Current in LT Modes
Note 56: This section applies only in LT modes.
The pin PS2 provides a serial interface in order to read in the value of the current fed to
the subscriber line by the power controller. This feature is available only in combination
with a power controller which supports this feature (the IEPC does not). The power
controller is to send eight-bit data which are read synchronous to the IOM®-2-clock
signals. Timing of the serial data stream forwarded to pin PS2 must be synchronous to
the signals of pin DIN (see Figure 83 for details).
Semiconductor Group
194
Data Sheet 01.99
INFINEON [ Infineon ]
