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PEB2091NV5.3 参数 Datasheet PDF下载

PEB2091NV5.3图片预览
型号: PEB2091NV5.3
PDF下载: 下载PDF文件 查看货源
内容描述: 集成电路通信( ISDN Echocancellation电路) [ICs for Communications(ISDN Echocancellation Circuit)]
分类和应用: 电信集成电路综合业务数字网通信
文件页数/大小: 299 页 / 1531 K
品牌: INFINEON [ Infineon ]
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PEB 2091  
PEF 2091  
Operational Description  
Line Active  
In the "Line Active" state, the IEC-Q transmits transparently in both directions. The  
U-Interface is synchronized and the maintenance channel is operational. The IEC-Q  
stays in the line-active state  
– during a normal activation procedure while the "ACT" bit = (0) is received  
– when an analog loop-back is established  
– while C/I-command AR0 is applied downstream  
In the case of normal activation with call control, binary "0s" have to be applied to the B  
and D channels in downstream direction. After the C/I-channel indication UAI has been  
issued, the layer-2 receiver should be fully operational to prevent the first layer-2  
message issued by the NT side upon the receipt of the ALI-code in the TE, to be lost.  
Loss of Signal  
The "Loss of Signal" state is entered upon the detection of a failure condition i.e. loss of  
receive signal (LSUE). The ACT bit is set to "0" and the C/I-channel indication LSL is  
issued. The IEC-Q waits for the C/I-channel command RES1 to enter the "Receive  
Reset" state.  
Loss of Synchronization  
The "Loss of Synchronization" state is entered upon the detection of a failure condition  
i.e. loss of framing by the LT Receiver (LOF). The ACT-bit is set to "0" and the  
C/I-channel indication RSY is issued. The IEC-Q waits for the C/I-channel command  
RES1 to enter the "Tear Down Error" state and subsequently the "Receive Reset" state.  
Pending Deactivation  
"Pending Deactivation" is a transient state entered after the receipt of a DR-code. The  
DEA-bit is set to "0". Timer T10 assures that the DEA-bit is set to "0" in at least three  
consecutive superframes before the transmit level is turned off.  
Pending Transparent  
"Pending Transparent" is a transient state entered upon the detection of ACT = 1 and left  
by T8. The ACT-bit is set to "1". The purpose of this state is to issue the C/I-channel  
indication AI (corresponding to "ready for sending") 24 ms after the ACT-bit has been set  
to "1" by the LT-transceiver. This assures that under normal operating conditions the  
AI-indication is issued first on the TE side and only afterwards on the LT side. Thus the  
layer-2 receiver in the TE is already operational when the first layer-2 message is issued  
by the LT side.  
Semiconductor Group  
158  
Data Sheet 01.99  
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