PEB 2086
Pin Definitions and Functions of PEB 2086 (cont’d)
Pin No. Pin No. Symbol Input (I) Function
P-MQFP-64 P-LCC-44 Output (O)
Open
Drain (OD)
58
12
DCL
I/O
Data Clock: Clock of frequency equal to twice the
data rate on the IOM-interface
LT-S/LT-T: clock input
TE: clock output
NT: clock input
512-kHz IOM-1 mode
4096-kHz IOM-2 mode
512-kHz IOM-1 mode
1536-kHz IOM-2 mode
512-kHz
30
51
50
49
40
6
A0
I
I
I
I
Address Bit 0 (Non-multiplexed bus type).
Address Bit 1 (Non-multiplexed bus type).
Address Bit 2 (Non-multiplexed bus type).
A1
5
A2
5
SDAR
Serial Data Port A Receive.
Serial data is received on this pin at
standard TTL or CMOS level. An integrated
pull-up circuit enables connection of an
open-drain/open collector driver without an
external pull-up resistor. SDAR is used only
if IOM-1 mode is selected.
64
63
55
56
18
17
10
10
A3
A4
A5
SIP
I
Address Bit 3 (Non-multiplexed bus type).
Address Bit 4 (Non-multiplexed bus type).
Address Bit 5 (Non-multiplexed bus type).
I
I
I/O
SLD Interface Port, IOM-1 mode. This line
transmits and receives serial data at
standard TTL or CMOS levels.
56
10
EAW
I
External
Awake
(terminal
specific
function). If a falling edge on this input is
detected, the ISAC-S generates an
interrupt and, if enabled, a reset pulse.
52
52
7
7
SDAX
SDS1
O
O
Serial Data Port A Transmit, IOM-1 mode.
Transmit data is shifted out via this pin at
standard TTL or CMOS levels.
Serial Data Strobe 1, IOM-2 mode.
A programmable strobe signal, selecting
either one or two B- or IC-channels on IOM-
2 interface, is supplied via this line. After
reset, SDAX/SDS1 takes on its function
only after a write access to SPCR is made.
61
6
15
21
M1
M0
I
I
Setting of operating mode.
Semiconductor Group
21