PEB 2086
Pin Definitions and Functions of PEB 2086 (cont’d)
Pin No. Pin No. Symbol Input (I) Function
P-MQFP-64 P-LCC-44 Output (O)
Open
Drain (OD)
53
53
8
8
SCA
FSD
O
Serial Clock Port A, IOM-1 timing mode 0.
A 128-kHz data clock signal for serial port A
(SSI).
Frame Sync Delayed, IOM-1 timing
mode 1. An 8-kHz synchronization signal,
delayed by 1/8 of a frame, for IOM-1 is
supplied. In this mode a minimal round-trip
delay for B1- and B2-channels is
guaranteed.
O
53
8
SDS2
O
Serial Data Strobe 2, IOM-2 mode. A
programmable strobe signal, selecting
either one or two B- or IC-channels on the
IOM-2 interface, is supplied via this line.
After reset, SCA/FSD/SDS2 takes on its
function only after a write access to SPCR
is made.
54
59
9
RST
I/O
I/O
Reset: A “High“ on this input forces the
ISAC-S into reset state. The minimum
pulse length is four DCL-clock periods or
four ms. If the terminal specific functions
are enabled, the ISAC-S may also supply a
reset signal.
13
FSC1
Frame Sync 1:
LT-S/NT/LT-T:
signal, IOM-1 and IOM-2 mode.
TE: programmable strobe output,
input
synchronization
a
selecting either B1- or B2-channel on the
SSI-interface, IOM-1 mode.
TE: frame sync output, “High“ during
channel 0 on the IOM-2 interface, IOM-2
mode.
60
14
FSC2
I/O
Frame Sync 2:
LT-S/LT-T/NT:
input
synchronization
signal, IOM-1 and IOM-2 mode.
TE: programmable strobe output, selecting
either B1- or B2-channel on the SSI-
interface, IOM-1 mode.
TE: Pull-up connection for IDP1, IOM-2
mode.
Semiconductor Group
20