PEB 2085
Pin Definitions and Functions of PEB 2085 (cont’d)
Pin No. Pin No.
P-DIP-40 P-LCC-44
Symbol Input (I)
Output (O)
Function
–
–
40
6
A0
A1
I
Address Bit 0 (Non-multiplexed bus type).
Address Bit 1 (Non-multiplexed bus type).
I
–
5
5
5
A2
SDAR
I
I
Address Bit 2 (Non-multiplexed bus type).
Serial Data Port A Receive.
Serial data is received on this pin at standard
TTL or CMOS level. An integrated pull-up circuit
enables connection of an open-drain/open
collector driver without an external pull-up
resistor. SDAR is used only if IOM-1 mode is
selected.
–
–
18
17
A3
A4
I
I
Address Bit 3 (Non-multiplexed bus type).
Address Bit 4 (Non-multiplexed bus type).
–
9
10
10
A5
SIP
I
Address Bit 5 (Non-multiplexed bus type)
SLD Interface Port, IOM-1 mode. This line
transmits and receives serial data at standard
TTL or CMOS levels.
I/O
9
10
EAW
I
External Awake (termina specific function). If a
falling edge on this input is detected, the ISAC-S
generates an interrupt and, if enabled, a reset
pulse.
6
6
7
7
SDAX
SDS1
O
O
Serial Data Port A Transmit, IOM-1 mode.
Transmit data is shifted out via this pin at
standard TTL or CMOS levels.
Serial Data Strobe 1, IOM-2 mode.
A programmable strobe signal, selecting either
one or two B or IC channels on IOM-2 interface,
is supplied via this line. After reset, SDAX/SDS1
takes on its function only after a write access to
SPCR is made.
14
18
15
21
M1
M0
I
I
Setting of operating mode (see chapter 2.2).
15
17
16
16
20
19
X2
X1
X0
I/O
I/O
I
Mode specific function pins (see chapter 2.2).
19
22
CP
I/O
Clock Pulses/Special purpose pin, IOM-1 mode
and IOM-2 (except TE) mode
19
22
BCL
O
Bit Clock: Clock of frequency 768 kHz, IOM-2
mode in TE.
Semiconductor Group
14