PEB 2085
1.1.1
Pin Definitions and Functions of PEB 2085
Input (I)
Pin No.
Pin No.
Symbol
Function
Output (O)
Open
P-DIP-40 P-LCC-44
Drain (OD)
37
38
39
40
1
2
3
4
41
42
43
44
1
2
3
4
AD0/D0 I/O
AD1/D1 I/O
AD2/D2 I/O
AD3/D3 I/O
AD4/D4 I/O
AD5/D5 I/O
AD6/D6 I/O
AD7/D7 I/O
Multiplexed Bus Mode: Address/data bus
transfers addresses from the µP system to the
ISAC-S and data between the µP system and
the ISAC-S.
Non-Multiplexed Bus Mode: Data bus.
Transfers data between the µP system and the
ISAC-S.
34
37
38
CS
I
Chip Select: A "Low" on this line selects the
ISAC-S for a read/write operation.
R/W
I
Read/Write: When "High" identifies a valid µP
access as a read operation. When "Low",
identifies a valid µP access as a write operation
(Motorola bus mode).
35
38
39
WR
DS
I
I
Write: This signal indicates a write operation
(Intel bus mode).
Data Strobe: The rising edge marks the end of
a valid read or write operation (Motorola bus
mode).
36
20
39
23
RD
I
Read: This signal indicates a read operation
(Intel bus mode).
INT
OD
Interrupt Request: The signal is activated
when the ISAC-S requests an interrupt. It is an
open drain output.
33
36
ALE
I
Address Latch Enable: A high on this line indi-
cates an address on the external address bus
(multiplexed bus type only).
ALE also selects the microprocessor interface
type (multiplexed or non-multiplexed)
P-LCC only.
Semiconductor Group
12
INFINEON [ Infineon ]
