PEB 2085
Pin Definitions and Functions of PEB 2085 (cont’d)
Function
Pin No. Pin No.
P-DIP-40 P-LCC-44
Symbol Input (I)
Output (O)
Serial Clock Port A, IOM-1 timing mode 0. A
128-kHz data clock signal for serial port A (SSI).
Frame Sync Delayed, IOM-1 timing mode 1. An
8-kHz synchronization signal, delayed by 1/8 of
a frame, for IOM-1 is supplied. In this mode a
minimal round-trip delay for B1 and B2 channels
is guaranteed.
Serial Data Strobe 2, IOM-2 mode. A
programmable strobe signal, selecting either
one or two B or IC channels on the IOM-2
interface, is supplied via this line.
7
8
SCA
O
7
8
FSD
O
O
7
8
SDS2
After reset, SCA/FSD/SDS2 takes on its function
only after a write access to SPCR is made.
Reset: A "High" on this input forces the ISAC-S
into reset state. The minimum pulse length is
four DCL clock periods or four ms. If the terminal
specific functions are enabled, the ISAC-S may
also supply a reset signal.
8
9
RST
I/O
I/O
Frame Sync 1:
12
13
FSC1
LT-S/NT/LT-T: input synchronization signal,
IOM-1 and IOM-2 mode
TE: a programmable strobe output, selecting
either B1 or B2 channel on the SSI interface,
IOM-1 mode
TE: frame sync output, "High" during channel 0
on the IOM-2 interface, IOM-2 mode.
Frame Sync 2:
LT-S/LT-T/NT: input synchronization signal
IOM -1 and IOM -2 mode
TE: programmable strobe output, selecting
either B1 or B2 channel on the SSI interface.
TE: Pull-up connection for IDP1, IOM-2 mode.
13
11
14
12
FSC2
DCL
I/O
I/O
Data Clock: Clock of frequency equal to twice
the data rate on the IOM interface
LT-S/LT-T: clock input 512-kHz IOM-1 mode
4096-kHz IOM-2 mode
TE: clock output
512-kHz IOM-1 mode
1536-kHz IOM-2 mode
512-kHz
NT: clock input
Semiconductor Group
13
INFINEON [ Infineon ]
