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PEB2086N 参数 Datasheet PDF下载

PEB2086N图片预览
型号: PEB2086N
PDF下载: 下载PDF文件 查看货源
内容描述: ISDN SubscribernAccess控制器 [ISDN SubscribernAccess Controller]
分类和应用: 数字传输接口电信集成电路电信电路综合业务数字网控制器
文件页数/大小: 320 页 / 1450 K
品牌: INFINEON [ Infineon ]
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Functional Description  
2.5.8  
S- and Q-Channel Access  
Access to the received/transmitted S or Q channel is provided via registers. As specified by  
CCITT I.430, the Q bit is transmitted from TE to NT in the position normally occupied by the  
auxiliary framing bit (F ) in one frame out of 5, whereas the S bit is transmitted from NT to TE  
A
in a spare bit, see figure 43.  
The functions provided by the ISAC-S are:  
TE/LT-T mode:  
– Synchronization to the received 20-frame multiframe by means of the received M bit pattern.  
Synchronism is achieved when the M bit has been correctly received during 20 consecutive  
frames starting from frame number 1 (table 7).  
– When synchronism is achieved, the four received S bits in frames 1, 6, 11 and 16 are stored  
as SQR1 to SQR4 in the SQRR register if the complete M bit multiframe pattern was  
correctly received in the corresponding multiframe. A change in any of the received four bits  
(SQR1, 2, 3 or 4) is indicated by an interrupt (CISQ in ISTA and SQC in CIR0).  
– When an M bit is observed to have a value different from that expected, the synchronism is  
considered lost. The SQR bits are not updated until synchronism is regained. The  
synchronization state is constantly indicated by the SYN bit in the SQRR register.  
– When synchronism with the received multiframe is achieved, the four bits SQX1 to SQX4  
stored in the SQXR register are transmitted as the four Q bits (F  
6, 11 and 16 respectively (starting from frame number one). Otherwise the bit transmitted is  
a mirror of the received F bit. At loss of synchronism (mismatch in M bit) the mirroring is  
A
bit position) in frames 1,  
A
resumed starting with the next F bit.  
A
Semiconductor Group  
100