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IN16C1054 参数 Datasheet PDF下载

IN16C1054图片预览
型号: IN16C1054
PDF下载: 下载PDF文件 查看货源
内容描述: Quard UART,具有256字节FIFO [Quard Uart with 256-Byte FIFO]
分类和应用: 先进先出芯片
文件页数/大小: 53 页 / 654 K
品牌: IKSEMICON [ IK SEMICON CO., LTD ]
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IN16C1054  
6.4 Interrupts  
As there are four independent 1-channel UARTs in SB16C1054, so there are four  
interrupts. Interrupts are assigned INT0, INT1, INT2, and INT3 for each channel. Each  
interrupt has six prioritized level’s interrupt generation capability. The IER enables each of  
the six types of interrupts and INT signal in response to an interrupt generation. When an  
interrupt is generated, the ISR indicates that an interrupt is pending and provides the type  
of interrupt. And SB16C1054 can handle for four interrupts with one global interrupt.  
Global interrupt treats four of each interrupt as one interrupt, so it is useful when external  
system has few interrupt resource. Global interrupt line is also used as INT0, and it is  
determined by AFR[4] that which one is used. If AFR[4] is cleared to ‘0’, INT0/GINT pin is  
selected as INT0 and if set to ‘1’, GINT. When you treat four interrupts as one interrupt,  
you should use several additional functions. GICR determines whether global interrupt  
occurs or not. While GICR[0] is set to ‘1’, an interrupt that is generated in four one-  
channel UARTs and treated as UNMASK is transmitted to GINT. But if GICR[0] is cleared  
to ‘0’, an interrupt is not transmitted to GINT though interrupts are generated in four one-  
channel UARTs and treated as MASK. So this interrupt is not transmitted to external  
CPU. The status of global interrupt and generation of interrupts in one-channel UART can  
be verified by GISR. The value set in GICR[0] is reflected in GISR[7], so the status of  
mask of global interrupt can be verified. GISR[0] shows the status of interrupt of UART  
that is connected to CS0#. If GISR[0] is cleared to ‘0’, it means that interrupt is not  
generated in the UART of CS0# and if set to ‘1’, it means that interrupt is generated. The  
value of GISR[0] shows the status of interrupt generated in the UART of CS0#,  
irrespective of the value set in GICR[0]. GICR[0] determines whether the interrupts  
generated in four one-channel UARTs that is connected to CS0#, CS1#, CS2#, and CS3#  
are transmitted to external devices or not, but does not determine whether the interrupts  
are generated or not in UARTs. The value of output signal when an interrupt is generated  
in GINT pin is selected by AFR[5]. That is, GINT can determine the polarity of asserted  
status. If AFR[5] is cleared to ‘0’, GINT outputs ‘0’ when global interrupt is generated. And  
if set to ‘1’, outputs ‘1’ when global interrupt is generated.  
Rev. 00  
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