欢迎访问ic37.com |
会员登录 免费注册
发布采购

IDT7206L25JI8 参数 Datasheet PDF下载

IDT7206L25JI8图片预览
型号: IDT7206L25JI8
PDF下载: 下载PDF文件 查看货源
内容描述: [FIFO, 16KX9, 25ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32]
分类和应用: 时钟先进先出芯片内存集成电路
文件页数/大小: 14 页 / 209 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
 浏览型号IDT7206L25JI8的Datasheet PDF文件第1页浏览型号IDT7206L25JI8的Datasheet PDF文件第2页浏览型号IDT7206L25JI8的Datasheet PDF文件第3页浏览型号IDT7206L25JI8的Datasheet PDF文件第4页浏览型号IDT7206L25JI8的Datasheet PDF文件第6页浏览型号IDT7206L25JI8的Datasheet PDF文件第7页浏览型号IDT7206L25JI8的Datasheet PDF文件第8页浏览型号IDT7206L25JI8的Datasheet PDF文件第9页  
IDT7203/7204/7205/7206/7207/7208CMOSASYNCHRONOUSFIFO  
2,048 x 9, 4,096 x 9, 8,192 x 9, 16,384 x 9, 32,768 x 9, 65,536 x 9  
COMMERCIAL,INDUSTRIALANDMILITARY  
TEMPERATURERANGES  
ACELECTRICALCHARACTERISTICS(1) (Continued)  
(Commercial: VCC = 5V ± 10%, TA = 0°C to +70°C; Industrial: VCC = 5V ± 10%, TA = –40°C to +85°C; Military: VCC = 5V ± 10%, TA = –55°C to +125°C)  
Military  
Commercial  
IDT7203L35  
IDT7204L35  
IDT7205L35  
IDT7206L35  
IDT7207L35  
IDT7208L35  
Military  
IDT7203L40  
Commercial  
IDT7203L50  
IDT7204L50  
IDT7205L50  
IDT7206L50  
IDT7207L50  
IDT7203L30  
IDT7204L30  
IDT7205L30  
IDT7206L30  
IDT7207L30  
Symbol  
fS  
Parameters  
Min.  
Max.  
Min.  
Max.  
Min.  
Max.  
20  
Min.  
Max.  
15  
Unit  
MHz  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ShiftFrequency  
Read Cycle Time  
AccessTime  
40  
10  
30  
5
25  
30  
20  
40  
40  
40  
30  
30  
30  
30  
40  
40  
30  
30  
10  
45  
10  
35  
5
22.22  
35  
50  
10  
40  
5
65  
15  
50  
10  
15  
5
tRC  
40  
50  
tA  
tRR  
ReadRecoveryTime  
ReadPulseWidth(2)  
20  
25  
30  
tRPW  
tRLZ  
tWLZ  
tDV  
(3)  
Read LOW to Data Bus LOW  
(3,4)  
Write HIGH to Data Bus Low-Z  
Data Valid from Read HIGH  
5
10  
5
10  
5
5
(3)  
tRHZ  
tWC  
Read HIGH to Data Bus High-Z  
Write Cycle Time  
WritePulseWidth(2)  
WriteRecoveryTime  
DataSet-upTime  
40  
30  
10  
18  
0
45  
35  
10  
18  
0
50  
40  
10  
20  
0
65  
50  
15  
30  
5
45  
50  
65  
tWPW  
tWR  
tDS  
tDH  
DataHoldTime  
tRSC  
tRS  
Reset Cycle Time  
40  
30  
30  
10  
40  
30  
30  
10  
30  
30  
30  
10  
45  
35  
35  
10  
45  
35  
35  
10  
35  
35  
35  
15  
50  
40  
40  
10  
50  
40  
40  
10  
40  
40  
40  
15  
65  
50  
50  
15  
65  
50  
50  
15  
50  
50  
50  
15  
ResetPulseWidth(2)  
ResetSet-upTime(3)  
ResetRecoveryTime  
RetransmitCycleTime  
RetransmitPulseWidth(2)  
RetransmitSet-upTime(3)  
RetransmitRecoveryTime  
Reset to EF LOW  
tRSS  
tRTR  
tRTC  
tRT  
tRTS  
tRTR  
tEFL  
tHFH,tFFH Reset to HF and FF HIGH  
45  
50  
65  
tRTF  
tREF  
tRFF  
tRPE  
tWEF  
tWFF  
tWHF  
tRHF  
tWPF  
tXOL  
tXOH  
tXI  
RetransmitLOWtoFlagsValid  
45  
50  
65  
Read LOW to EF LOW  
30  
35  
45  
Read HIGH to FF HIGH  
Read Pulse Width after EF HIGH  
Write HIGH to EF HIGH  
Write LOW to FF LOW  
Write LOW to HF Flag LOW  
Read HIGH to HF Flag HIGH  
Write Pulse Width after FF HIGH  
Read/Write LOW to XO LOW  
Read/Write HIGH to XO HIGH  
XI Pulse Width(2)  
30  
35  
45  
30  
35  
45  
30  
35  
45  
45  
50  
65  
45  
50  
65  
35  
40  
50  
35  
40  
50  
10  
10  
ns  
tXIR  
XI Recovery Time 10  
XISet-upTime  
tXIS  
ns  
NOTES:  
1. Timings referenced as in AC Test Conditions.  
2. Pulse widths less than minimum are not allowed.  
3. Values guaranteed by design, not currently tested.  
4. Only applies to read data flow-through mode.  
5
 复制成功!