IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
RAM for 16-bit-or-more word systems. Using the IDT MAS-
TER/SLAVE Dual-Port RAM approach in 16-bit or wider
memory system applications results in full-speed, error-free
operation without the need for additional discrete logic.
This device provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. An automatic power down feature controlled by
CE
permits the on-chip circuitry of each port to enter a very low
standby power mode.
Fabricated using IDT’s CMOS high-performance technol-
ogy, these devices typically operate on only 750mW of power.
Low-power (L) versions offer battery backup data retention
capability with typical power consumption of 500µW from a 2V
battery.
The IDT7005 is packaged in a ceramic 68-pin PGA, a 68-
pin quad flatpack, a 68-pin PLCC and a 64-pin Thin Plastic
Quad Flatpack (TQFP). Military grade product is manufac-
tured in compliance with the latest revision of MIL-STD-883,
Class B, making it ideally suited to military temperature
applications demanding the highest level of performance and
reliability.
PIN CONFIGURATIONS
(1,2)
I/O
1L
I/O
0L
N/C
SEM
L
4
W
L
R/
6
5
INDEX
I/O
2L
I/O
3L
I/O
4L
I/O
5L
GND
I/O
6L
I/O
7L
V
CC
GND
I/O
0R
I/O
1R
I/O
2R
V
CC
I/O
3R
I/O
4R
I/O
5R
I/O
6R
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
9
8
7
3
N/C
N/C
V
CC
A
12L
A
11L
A
10L
A
9L
A
8L
A
7L
A
6L
2
1 68 67 66 65 64 63 62 61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
OE
L
CE
L
IDT7005
J68-1
F68-1
PLCC / FLATPACK
TOP VIEW
(3)
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
INT
L
BUSY
L
BUSY
R
INT
R
GND
M/
S
44
26
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
A
0R
A
1R
A
2R
A
3R
A
4R
I/O
7R
N/C
SEM
R
N/C
N/C
GND
A
12R
A
11R
A
10R
A
9R
A
8R
A
7R
A
6R
A
5R
OE
R
W
R
CE
R
R/
L
SEM
L
I/O
1L
I/O
0L
INDEX
59
58
57
64
63
62
56
55
54
53
52
61
60
I/O
2L
I/O
3L
I/O
4L
I/O
5L
GND
I/O
6L
I/O
7L
V
CC
GND
I/O
0R
I/O
1R
I/O
2R
V
CC
I/O
3R
I/O
4R
I/O
5R
1
2
3
4
5
6
7
8
9
51
50
49
N/C
V
CC
A
12L
A
11L
A
10L
A
9L
A
8L
A
7L
A
6L
A
5L
OE
L
2738 drw 02
CE
L
R/
W
48
47
46
45
44
A
4L
A
3L
A
2L
A
1L
A
0L
INT
L
IDT7005
PN-64
TQFP
TOP VIEW
(3)
43
42
41
40
39
38
37
36
35
34
BUSY
L
GND
M/
S
10
11
12
13
14
15
BUSY
R
INT
R
A
0R
A
1R
A
2R
A
3R
A
4R
20
21
22
23
24
25
17
18
19
26
27
28
29
30
31
A
7R
A
8R
A
6R
I/O
6R
I/O
7R
SEM
R
A
12R
R/
R
A
11R
A
10R
CE
R
OE
R
GND
A
9R
A
5R
N/C
32
16
33
NOTES:
1. All Vcc pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. This text does not indicate orientation of the the actual part-marking.
6.06
W
2738 drw 03
2
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
