IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
RAM for 16-bit-or-more word systems. Using the IDT MAS- ogy, these devices typically operate on only 750mW of power.
TER/SLAVE Dual-Port RAM approach in 16-bit or wider Low-power (L) versions offer battery backup data retention
memory system applications results in full-speed, error-free capabilitywithtypicalpowerconsumptionof500µWfroma2V
operation without the need for additional discrete logic.
This device provides two independent ports with separate
battery.
The IDT7005 is packaged in a ceramic 68-pin PGA, a 68-
control, address, and I/O pins that permit independent, pin quad flatpack, a 68-pin PLCC and a 64-pin Thin Plastic
asynchronous access for reads or writes to any location in Quad Flatpack (TQFP). Military grade product is manufac-
memory. An automatic power down feature controlled by CE tured in compliance with the latest revision of MIL-STD-883,
permits the on-chip circuitry of each port to enter a very low Class B, making it ideally suited to military temperature
standby power mode.
applications demanding the highest level of performance and
Fabricated using IDT’s CMOS high-performance technol- reliability.
PIN CONFIGURATIONS (1,2)
INDEX
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
I/O2L
I/O3L
I/O4L
I/O5L
GND
I/O6L
I/O7L
A
A
A
A
A
A
5L
4L
3L
2L
1L
0L
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
59
58
57
56
IDT7005
J68-1
55
54
53
52
51
50
49
48
47
46
45
44
F68-1
INT
BUSY
GND
M/
BUSY
INT
L
V
CC
L
GND
I/O0R
I/O1R
I/O2R
PLCC / FLATPACK
(3)
S
TOP VIEW
R
R
V
CC
A
A
A
A
A
0R
I/O3R
I/O4R
I/O5R
I/O6R
1R
2R
3R
4R
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
2738 drw 02
INDEX
1
2
3
4
5
6
48
47
46
45
44
43
42
41
40
39
38
37
I/O2L
I/O3L
A
A
A
A
A
4L
3L
2L
1L
0L
I/O4L
I/O5L
GND
I/O6L
I/O7L
IDT7005
PN-64
INT
L
7
8
BUSY
L
V
CC
GND
TQFP
TOP VIEW
9
GND
I/O0R
I/O1R
(3)
M/S
10
11
12
BUSY
R
INT
R
I/O2R
A
A
A
A
A
0R
13
14
15
16
V
CC
36
35
34
33
1R
2R
3R
4R
I/O3R
I/O4R
I/O5R
2738 drw 03
NOTES:
1. All Vcc pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. This text does not indicate orientation of the the actual part-marking.
6.06
2
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
