932SQ420D
PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
Revision History
Rev.
0.9
A
Issue Date Who Description
9/16/2010 RDW Initial Release
9/20/2010 RDW Minor typo corrections
Page #
-
Various
B
C
D
3/1/2011
3/9/2011
RDW Added rise/fall variation to DC Electrical Characteristics Table
RDW Corrected Line 0 of NS_SAS Margining Table.
9
19
7
4/28/2011 RDW Corrected MLF packaging pin description. Pin 37 was missing.
Updated Power Down Functionality table to clarify functionality of single-
7/26/2011 RDW ended outputs in power down.
1. Added "Case Temperature" spec to Abs Max ratings
9/20/2011 RDW 2. Added Thermal Characteristics
1. Updated Phase Jitter Table to correct typo in "Conditions" column for
12/8/2011 RDW SAS.
E
F
2
Various
11, 23,
24
G
2. Mark Spec Added.
1. Updated Rp values on Output Terminations Table from 43.2 ohms to
42.2 or 43.2 ohms to be consistent with Intel.
H
4/18/2012 RDW
8
IDT® PCIE GEN 2/3 & QPI CLOCK FOR ROMLEY-BASED SERVERS
26
932SQ420D
REV H 042012
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
