ICS9DB102
Two Output Differential Buffer for PCIe Gen1 & Gen2
SMBus Table: Device Control Register, READ/WRITE ADDRESS (D4/D5)
Byte 0
Pin #
Name
Control Function Type
0
1
PWD
Functions
controlled by
SMBus
Functions
controlled by
device pins
Enables SMBus
RW
Control
-
SW_EN
1
Bit 7
registers
-
-
-
-
-
RESERVED
RESERVED
RW
RW
RW
RW
RW
-
-
-
-
-
X
X
X
X
X
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
RESERVED
RESERVED
RESERVED
Selects PLL
-
-
PLL BW #adjust
PLL Enable
RW
RW
Low BW
High BW
1
1
Bit 1
Bit 0
Bandwidth
Bypasses PLL for
board test
PLL bypassed PLL enabled
(fan out mode) (ZDB mode)
SMBus Table: Output Enable Register
Byte 1 Pin # Name
Bit 7
Control Function Type
0
1
PWD
X
-
-
-
-
-
-
-
-
RESERVED
RW
RW
RW
RW
RW
RW
RW
RW
-
-
-
-
-
-
-
-
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
X
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
X
X
X
X
X
X
SMBus Table: Function Select Register
Byte 2 Pin # Name
Bit 7
Control Function Type
0
1
PWD
X
RESERVED
RW
RW
RW
RW
RW
RW
RW
RW
-
-
-
-
-
-
-
-
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
X
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
-
-
-
-
-
-
X
X
X
X
X
X
SMBus Table: Vendor & Revision ID Register
Byte 3
Bit 7
Pin #
Name
RID3
RID2
RID1
RID0
VID3
VID2
VID1
VID0
Control Function Type
0
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
-
PWD
-
-
-
-
-
-
-
-
R
0
0
0
1
0
0
0
1
R
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
REVISION ID
R
R
R
R
VENDOR ID
R
R
IDT® Two Output Differential Buffer for PCIe Gen1 & Gen2
852 REV K 04/01/10
9
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
