ICS341
FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER
EPROM CLOCK SYNTHESIZER
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±±5, Ambient Temperature -40 to +85 C
Parameter
Symbol
Conditions
Fundamental Crystal
Input Clock
Min.
5
Typ. Max. Units
Input Frequency
F
27
50
MHz
MHz
MHz
ns
IN
2
Output Frequency
Output Rise Time
Output Fall Time
Duty Cycle
0.25
200
t
20% to 80%, Note 1
80% to 20%, Note 1
Note 2
1
1
OR
t
ns
OF
40
49-51
TBD
60
%
Output Frequency Synthesis
Error
Configuration Dependent
ppm
Power-up Time
PLL lock time from
power-up
4
10
2
ms
ms
PDTS goes high until
stable CLK output,
Spread Spectrum Off
.2
PDTS goes high until
stable CLK output,
Spread Spectrum On
4
7
ms
One Sigma Clock Period Jitter
Maximum Absolute Jitter
Configuration Dependent
50
ps
ps
t
Deviation from Mean.
+200
ja
Configuration Dependent
Note 1: Measured with 15 pF load.
Note 2: Duty Cycle is configuration dependent. Most configurations are minimum 45% and maximum 55%.
Note 3: ICS test mode output occurs for first 170 clock cycles on CLK for each PLL powered up. PDTS transition
high on select address change.
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
Still air
150
140
120
40
C/W
C/W
C/W
C/W
JA
JA
JA
JC
1 m/s air flow
3 m/s air flow
Thermal Resistance Junction to Case
IDT® / ICS™ FIELD PROGRAMMABLE SS VERSACLOCK SYNTHESIZER
6
ICS341
REV M 090613
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
