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332M-33LF 参数 Datasheet PDF下载

332M-33LF图片预览
型号: 332M-33LF
PDF下载: 下载PDF文件 查看货源
内容描述: [Clock Generator, 120MHz, CMOS, PDSO8, 0.150 INCH, ROHS COMPLIANT, SOIC-8]
分类和应用: 时钟光电二极管外围集成电路晶体
文件页数/大小: 5 页 / 97 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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ICS332-33
Dual Output Clock Synthesizer
Pin Assignment
X1
VDD
GND
CLK1
1
2
3
4
8
7
6
5
X2
PDTS
SEL
CLK2
Output Clock Selection Table
SEL CLK1 (MHz)
CLK2 (MHz)
Spread on
CLK2
-
± 1.0%
0
1
52
52
120
120
8-pin (150 mil) SOIC
Pin Descriptions
Pin
1
2
3
4
Pin
X1
VDD
GND
CLK1
Pin
XI
Power
Power
Output
5
6
7
8
CLK2
SEL
PDTS
X2
Output
Input
Input
XO
Pin Description
Connect this pin to a 16.384 MHz crystal input.
Connect to +3.3V.
Connect to ground.
52 MHz clock output with ±1.0% spread spectrum. Weak internal
pull-down when tri-state.
120 MHz clock output. Weak internal pull-down when tri-state.
Select pin for frequency selection on CLK1 and CLK2. Internal pull-up.
Powers down entire chip. Tri-states CLK outputs when low. Internal
pull-up.
Float for clock input.
External Components
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50Ω trace (a
commonly used trace impedance), place a 33Ω resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20Ω
.
Crystal Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
between the crystal and device. Crystal capacitors
must be connected from each of the pins X1 and X2 to
ground.
The value (in pF) of these crystal caps should equal
(C
L
-6 pF)*2. In this equation, C
L
= crystal load
capacitance in pF. Example: For a crystal with a 16 pF
Decoupling Capacitor
As with any high-performance mixed-signal IC, the
ICS332-33 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and the PCB ground plane.
MDS 332-33 D
2
I n t e gra te d D ev i ce Technology, Inc.
Revision 051310
w w w. i d t . c o m