ICS2059-02
CLOCK MULTIPLIER AND JITTER ATTENUATOR
VCXO AND SYNTHESIZERS
A “normalized” PLL loop bandwidth may be calculated
as follows:
Charge Pump Current Table
R
S
×
I
CP
×
345
575
NBW
= -----------------------------------------
N
R
SET
1.4 MΩ
680 kΩ
540 kΩ
120 kΩ
Charge Pump Current
(I
CP
)
10
µA
20
µA
25
µA
100
µA
The “normalized” bandwidth equation above does not
take into account the effects of damping factor or the
second pole. However, it does provide a useful
approximation of filter performance.
The loop damping factor is calculated as follows:
Special considerations must be made in choosing loop
components C
S
and C
P.
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50Ω trace (a
commonly used trace impedance), place a 33Ω resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20Ω (The optional series termination resistor
.
is not shown in the External Component Schematic.)
Damping Factor = R
S
×
375
×
I
CP
×
C
S
625
------------------------------------------
-
N
Where:
R
S
= Value of resistor in loop filter (Ohms)
I
CP
= Charge pump current (amps)
(refer to Charge Pump Current Table, below)
N = Crystal multiplier shown in the above
table
C
S
= Value of capacitor C
1
in loop filter (Farads)
As a general rule, the following relationship should be
maintained between components C
1
and C
2
in the loop
filter:
Decoupling Capacitors
As with any high-performance mixed-signal IC, the
ICS2059-02 must be isolated from system power
supply noise to perform optimally.
Decoupling capacitors of 0.01µF must be connected
between each VDD and the PCB ground plane. To
further guard against interfering system supply noise,
the ICS2059-02 should use one common connection to
the PCB power plane as shown in the diagram on the
next page. The ferrite bead and bulk capacitor help
reduce lower frequency noise in the supply that can
lead to output clock phase modulation.
C
P
S
=
-----
-
C
20
IDT™ / ICS™
CLOCK MULTIPLIER AND JITTER ATTENUATOR
5
ICS2059-02
REV E 051310
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
