ICS2059-02
CLOCK MULTIPLIER AND JITTER ATTENUATOR
VCXO AND SYNTHESIZERS
optimize loop response characteristics for a given
application.
Referencing the External Component Schematic on this
page, the external loop filter is made up of the
components R
Z
, C
1
and C
2
. R
SET
establishes PLL
charge pump current and therefore influences loop filter
characteristics.
External Component Schematic
C
L
(Refer to Crystal
Tuning section)
C
L
Crystal
X1
VDD
VDD
VDD
VIN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
X2
ISEL
ICLK1
ICLK2
SEL0
CLK
SEL1
ISET
P
R
S
C
S
GND
GND
CHGP
16-pin (173 mil) TSSOP
R
SET
Recommended Loop Filter Values Vs. Output Frequency Range Selection
Crystal
SEL1 SEL0
Multiplier
(N)
0
0
2592
0
1
2430
1
0
1728
1
1
1716
M
0
128
M
1
1
R
SET
R
S
C
S
0.47
µF
0.68
µF
0.68
µF
0.68
µF
1
µF
1
µF
C
P
Loop
Bandwidth
(-3dB point)
Damping
Factor
3.00
2.97
3.17
3.18
3.16
3.08
180 kΩ
120 kΩ
330 kΩ
330 kΩ
120 kΩ
1 MΩ
820 kΩ
560 kΩ
680 kΩ
680 kΩ
330 kΩ
22 kΩ
1.8 nF
3.3 nF
3.9 nF
3.9 nF
3.3 nF
3.3 nF
11.2 Hz
11.8 Hz
11.5 Hz
11.5 Hz
14.5 Hz
204.2 Hz
Note: For SEL input pin programming: 0 = GND, 1 = VDD, M = Floating
IDT™ / ICS™
CLOCK MULTIPLIER AND JITTER ATTENUATOR
4
ICS2059-02
REV E 051310
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
