ICS1893CF Data Sheet Rev. J - Release
Chapter 9 DC and AC Operating Conditions
9.5.9 10M Media Independent Interface: Transmit Latency
Table 9-16 lists the significant time periods for the 10M MII transmit latency. The time periods consist of
timings of signals on the following pins:
• TXEN
• TXCLK
• TXD (that is, TXD[3:0])
• TP_TX (that is, TP_TXP and TP_TXN)
Figure 9-10 shows the timing diagram for the time periods.
Table 9-16. 10M MII Transmit Latency Timing
Time
Period
Parameter
Conditions Min. Typ. Max.
10M MII 1.2
Units
t1
TXD Sampled to MDI Output of First Bit
–
2
Bit times
Figure 9-10. 10M MII Transmit Latency Timing Diagram
TXEN
TXCLK
TXD
5
5
5
†
TP_TX
t1
†
Manchester
encoding is
not shown.
ICS1893CF, Rev. J, 08/11/09
August, 2009
Copyright © 2009, Integrated Device Technology, Inc.
All rights reserved.
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