ICS1893AF Data Sheet - Release
Chapter 6 Interface Overviews
Figure 6-4 shows typical biasing and LED connections for the ICS1893AF.
Figure 6-4. ICS1893AF LED - PHY Interface
ICS1893AF
P4RD
8
P3TD
6
P2LI
4
P1CL
3
P0AC
1
REC
LINK
ACTIVITY
COL
TRANS
VDD
10KΩ
10KΩ
1KΩ
LED
10KΩ
1KΩ
LED
10KΩ
1KΩ
LED
10KΩ
This circuit decodes to PHY address = 1.
Notes:
1. All LED pins must be set during reset.
2. Caution: PHY address 00 tri-states the MII interface. Don’t use PHY address 00.
3. For more reliable address capture during power-on reset, add a 10KΩ resistor across
the LED.
ICS1893AF, Rev D 10/26/04
October, 2004
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
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IDT [ INTEGRATED DEVICE TECHNOLOGY ]
