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1892Y-14 参数 Datasheet PDF下载

1892Y-14图片预览
型号: 1892Y-14
PDF下载: 下载PDF文件 查看货源
内容描述: [Ethernet Transceiver, 1-Trnsvr, CMOS, PQFP64]
分类和应用: 以太网:16GBASE-T电信电信集成电路
文件页数/大小: 148 页 / 1762 K
品牌: IDT [ INTEGRATED DEVICE TECHNOLOGY ]
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ICS1892  
TSD  
10Base-T/100Base-TXIntegrated PHYceiver™  
9.2.4.4 MAC/Repeater Interface Pins for Link Pulse Interface  
Table 9-9 lists the MAC/Repeater Interface pin descriptions for the Link Pulse Interface.  
Table 9-9. MAC/Repeater Interface Pins: Link Pulse Interface  
MII Pin  
Name  
Link  
Pluse  
Pin  
Pin  
No.  
Pin  
Type  
Pin Description  
Name  
COL  
49  
50  
No  
Collision (Detect).  
Connect For the Link Pulse Interface, this pin is a no connect. For more  
information, see Table 6-3.  
CRS  
RXER  
No  
Carrier Sense.  
Connect For the Link Pulse Interface, this pin is a no connect. For more  
information, see Table 6-3.  
LPRX  
38  
37  
Output Link Pulse (Interface) Receive Error.  
This pin’s description is the same as that given in Table 9-6.  
RXCLK LRCLK  
Output Link (Pulse Interface) Receive Clock.  
The ICS1892 sources the LRCLK to the MAC/repeater. The  
ICS1892 uses LRCLK to synchronize the signals on the LPRX  
pin. The signal on the LRCLK pin is conditioned by RXTRI.  
MDC  
MDC  
MDIO  
31  
30  
Input  
Management Data Clock.  
This pin’s description is the same as that given in Table 9-6.  
MDIO  
Input/ Management Data Input/Output.  
Output This pin’s description is the same as that given in Table 9-6.  
RXD0,  
RXD1,  
RXD2,  
RXD3  
35,  
34,  
33,  
32  
No  
Receive Data 0–3.  
Connect For the Link Pulse Interface, these pins are a no connect. For  
more information, see Table 6-3.  
RXDV  
36  
No  
Receive Data Valid.  
Connect For the Link Pulse Interface, this pin is a no connect. For more  
information, see Table 6-3.  
RXER  
RXTRI  
LPRX  
38  
39  
Output Link Pulse (Interface) Receive Error.  
This pin’s description is the same as that given in Table 9-6.  
Input  
Receive (Interface), Tri-State.  
The input on this pin is from a MAC. When the signal on this pin is  
logic:  
Low, the MAC indicates that it is not in a tri-state condition.  
High, the MAC indicates that it is in a tri-state condition. In this  
case, the ICS1892 acts to ensure that only one PHY is active  
at a time.  
TXCLK LTCLK  
43  
Link (Pulse Interface) Transmit Clock.  
This pin’s description is the same as that given in Table 9-6.  
TXD0,  
TXD1,  
TXD2,  
TXD3  
45,  
46,  
47,  
48  
No  
Transmit Data 0–3.  
Connect For the Link Pulse Interface, these pins are a no connect. For  
more information, see Table 6-3.  
IDT™ / ICS™ 10Base-T/100Base-TX Integrated PHYceiver™  
ICS1892  
117  
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