ICS1522
User-Programmable Video Clock Generator/ Line-Locked Clock Regenerator
ICS1522
TSD
REG#
6
BIT(S)
3
BIT REF.
OMUX1
DESCRIPTION
OUT1 Select (Default=0)
0=Load Counter Output 1=Diff.
Output Divided by 4 at 0 Degrees
OUT1 will track OMUX1 when AUXEN=1
OUT2 Select (Default=0)
0=Internal Feedback Pulse 1=Diff.
Output Divided by 4 at 90 Degrees
OUT2 will track OMUX2 when AUXEN=1\
OUT3 Select (Default=0)
0=Feedback Sync Pulse LO
1=Diff. Output Divided by 4 at 180
Degrees OUT3 will track OMUX3 when AUXEN=1
OUT4 Select (Default=1)
0=Feedback Sync Pulse HI
1=Diff. Output Divided by 4 at 270 Degrees
OUT4 will track OMUX4 when AUXEN=1
Output Reset (Default=0)
When set to one, the CLK+ output is
kept high and the CLK-output is kept low. When returned to zero,
the CLK+ and CLK-outputs will resume toggling on a rising edge
of the OUT1 output (programmed for Load Counter) within +/- 1
clock period.
Output Test Mode (Default=0)
0=Normal Output Operation
1=Output Test Mode (see OMUX1-4 and AUXCLK)
Output Clock when in Test Mode (Default=0)
CLK+ and CLK- will track AUXCLK when AUXEN=1
XTAL/EXTREF Input Buffer (Default=0)
0=Crystal Input Operation
1=External Reference Input Operation
6
4
OMUX2
6
5
OMUX3
6
6
OMUX4
6
7
DACRST
6
8
AUXEN
6
6
9
10
AUXCLK
EXTREF
8
IDT™ / ICS™
User-Programmable Video Clock Generator/ Line-Locked Clock Regenerator
8
ICS1522
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
