ICS1522
ICS1522
User-Programmable Video Clock Generator/ Line-Locked Clock Regenerator
TSD
Memory Definition
ICS1522 memory is loaded serially with the least significant bit clocked into the device first. After the R/Wn bit, the next
three bits of the programming word (15 bits) hold the memory location to be loaded. The least significant 11 bits are the
data to be loaded (see Timing Diagram).
DEFAULT
MEMORY
ADDRESS
DATA BITS VAL UES
(HEX)
NAME
DESCRIPTION
000
001
001
010
010
011
011
100
100
100
100
100
0-10
0-7
8-10
0-7
8-10
0-9
10
0-2
3-5
6
04F
03
0
06
0
013
0
4
3
1
1
1
F(0:10)
LO(0:7)
A
HI(0:7)
A
R(0:9)
REF
VCO(0:2) VCO Gain
PFD(0:2) Phase Detector Gain
PDEN
INT_FLT Internal Loop Filter (1 = Internal)
INT_VCO Internal VCO (1 = Internal)
Feedback Divider Modulus (Modulus = Value +1)
M Counter Lo Sync State
Don't Care
M Counter Hi Sync State
Don't Care
Reference Divider Modulus (Modulus = Value + 1)
POL External Reference Polarity (1 =Invert)
Phase Detector Enable (1 =Enable)
7
8
Internal feedback input clock select
(0 = VCO Output)
100
9
0
CLK_SEL
100
101
101
101
101
101
101
101
101
101
110
110
110
110
110
110
110
110
110
10
0
1
2
3
4-5
6-7
8
1
1
0
0
0
0
3
1
0
1
7
0
0
0
1
0
0
0
0
Reserved Reserved - Set to One
FBK_SEL Feedback Select (1 =Internal)
FBK_POL External Feedback Polarity (1 =Invert)
ADD
Addition of 1 VCO Cycle (0 to 1 = Add)
SWLW
Removal of 1 VCO Cycle (0 to 1 = Swallow)
PDA(0:1) Output Post-Scaler
PDB(0:1) Feedback Post-Scaler
LD_LG
F_EN
Fine Phase Adj. Lead/Lag (1=Lead)
Fine Phase Adj. Enable (1=Enable)
9
10
0-2
3
4
5
6
7
8
9
Reserved Reserved - Set to One
L(0:2) Load Counter
OMUX1 OUT1 Select (0 = Load Cntr, 1 = Div By 4 0Deg)
OMUX2 OUT2 Select (0 = Int Fbk, 1 = Div By 4 90Deg)
OMUX3 OUT3 Select (0 = Sync Lo, 1 = Div By 4 180Deg)
OMUX4 OUT4 Select (0 = Sync Hi, 1 = Div By 4 270Deg)
DACRST Output Reset (CLK+ = 1, CLK- = 0)
AUXEN
Output Test Mode (1 = Test, See Board Test Support)
AUXCLK Output Clock When in Test Mode
EXTREF XTAL/EXTREF Input Buffer (1=EXTREF)
10
12
IDT™ / ICS™ User-Programmable Video Clock Generator/ Line-Locked Clock Regenerator
ICS1522
12
IDT [ INTEGRATED DEVICE TECHNOLOGY ]
