IC41C16100S
IC41LV16100S
1M x 16 (16-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
DESCRIPTION
FEATURES
The ICSI IC41C16100S and IC41LV16100S are 1,048,576 x
16-bit high-performance CMOS Dynamic Random Access
Memories. These devices offer an accelerated cycle access
called EDO Page Mode. EDO Page Mode allows 1,024 ran-
dom accesses within a single row with access cycle time as
short as 20 ns per 16-bit word. The Byte Write control, of upper
and lower byte, makes the IC41C16100S ideal for use in
16-, 32-bit wide data bus systems.
• Extended Data-Out (EDO) Page Mode access cycle
• TTL compatible inputs and outputs; tristate I/O
• Refresh Interval:
Refresh Mode: 1,024 cycles /16 ms
RAS-Only, CAS-before-RAS (CBR), and Hidden
Self refresh Mode - 1,024 cycles / 128ms
• JEDEC standard pinout
• Single power supply:
These features make the IC41C16100Sand IC41LV16100S
ideally suited for high-bandwidth graphics, digital signal
processing, high-performance computing systems, and
peripheral applications.
5V ± 10% (IC41C16100S)
3.3V ± 10% (IC41LV16100S)
• Byte Write and Byte Read operation via two CAS
• Industrail Temperature Range -40°C to 85°C
The IC41C16100S and IC41LV16100S are packaged in a
42-pin 400mil SOJ and 400mil 50- (44-) pin TSOP-2.
KEY TIMING PARAMETERS
Parameter
-45
45
11
22
16
77
-50
50
13
25
20
84
-60
60
15
30
25
Unit
ns
ns
ns
ns
Max. RAS Access Time (tRAC)
Max. CAS Access Time (tCAC)
Max. Column Address Access Time (tAA)
Min. EDO Page Mode Cycle Time (tPC)
Min. Read/Write Cycle Time (tRC)
104
ns
PIN CONFIGURATIONS
42-Pin SOJ
50(44)-Pin TSOP II
PIN DESCRIPTIONS
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
1
50
49
48
47
46
45
44
43
42
41
40
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
A0-A9
I/O0-15
WE
Address Inputs
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
1
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
GND
2
2
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
Data Inputs/Outputs
Write Enable
3
3
4
4
5
5
OE
Output Enable
6
6
7
RAS
UCAS
LCAS
Vcc
Row Address Strobe
Upper Column Address Strobe
Lower Column Address Strobe
Power
7
8
8
9
9
10
11
I/O8
10
11
12
13
14
15
16
17
18
19
20
21
NC
NC
NC
WE
RAS
NC
NC
A0
15
16
17
18
19
20
21
22
23
24
25
36
35
34
33
32
31
30
29
28
27
26
NC
NC
LCAS
UCAS
OE
LCAS
UCAS
OE
WE
RAS
NC
GND
NC
Ground
No Connection
A9
A9
NC
A8
A8
A0
A7
A7
A1
A6
A1
A6
A2
A5
A2
A5
A3
A4
A3
A4
VCC
GND
VCC
GND
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
DR010-0D 11/26/2004
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
