ICS9DB202
Integrated
Circuit
Systems, Inc.
PCI EXPRESS
™
JITTER
ATTENUATOR
GENERAL DESCRIPTION
Features
The ICS9DB202 is a high perfromance 1-to-2 Dif- • Two 0.7V current mode differential HCSL output pairs
ICS
ferential-to-HCSL Jitter Attenuator designed for use
• 1 differential clock input
HiPerClockS™
in PCI Express™ systems. In some PCI Express™
systems, such as those found in desktop PCs, the
PCI Express™ clocks are generated from a low
• CLK and nCLK supports the following input types:
LVPECL, LVDS, LVHSTL, SSTL, HCSL
bandwidth, high phase noise PLL frequency synthesizer.In these
systems, a jitter-attenuating device may be necessary in order
to reduce high frequency random and deterministic jitter com-
ponents from the PLL synthesizer and from the system board.
The ICS9DB202 has two PLL bandwidth modes. In low band-
width mode, the PLL loop bandwidth is 500kHz.This setting of-
fers the best jitter attenuation and is still high enough to pass a
triangular input spread spectrum profile. In high bandwidth mode,
the PLL bandwidth is at 1MHz and allows the PLL to pass more
spread spectrum modulation.
• Maximum output frequency: 140MHz
• Output skew: 110ps (maximum)
• Cycle-to-cycle jitter: 110ps (maximum)
• RMS phase jitter @ 100MHz, (1.5MHz - 22MHz):
2.42ps (typical)
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
• Lead-Free package available
For serdes which have x10 reference multipliers instead of x12.5
multipliers, each of the two PCI Express™ outputs (PCIEX0:1)
can be set for 125MHz instead of 100MHz by configuring the
appropriate frequency select pins (FS0:1).
• Industrial temperature information available upon request
PIN ASSIGNMENT
VDDA
BYPASS
IREF
FS1
VDD
PLL_BW
CLK
1
2
3
4
5
6
7
8
20
19
18
17
16
15
14
13
12
11
nCLK
FS0
VDD
BLOCK DIAGRAM
IREF
Current
Set
-
GND
GND
+
PCIEXT1
PCIEXC1
VDD
PCIEXT0
PCIEXC0
VDD
9
10
1 HiZ
0 Enabled
nOE0
nOE1
nOE0
ICS9DB202
20-LeadTSSOP
6.50mm x 4.40mm x 0.92
package body
0
1
PCIEXT0
nPCIEXC0
nCLK
CLK
Loop
Filter
Phase
Detector
0 ÷4
1 ÷5
VCO
G Package
Top View
ICS9DB202
20-Lead, 209-MIL SSOP
5.30mm x 7.20mm x 1.75mm
body package
FS0
÷5
F Package
TopView
Internal Feedback
0
1
PCIEXT1
nPCIEXC1
0 ÷5
1 ÷4
FS1
BYPASS
nOE1
1 HiZ
0 Enabled
9DB202CG
www.icst.com/products/hiperclocks.html
REV. A OCTOBER 6, 2004
1
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
