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ICS1572M-101 参数 Datasheet PDF下载

ICS1572M-101图片预览
型号: ICS1572M-101
PDF下载: 下载PDF文件 查看货源
内容描述: 用户可编程差分输出图形时钟发生器 [User Programmable Differential Output Graphics Clock Generator]
分类和应用: 晶体时钟发生器外围集成电路光电二极管
文件页数/大小: 19 页 / 279 K
品牌: ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
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ICS1572 Application Information  
Output Circuit Considerations for the ICS1572  
Stripline is the other form a PCB transmission line can take. A  
buried trace between ground planes (or between a power plane  
and a ground plane) is common in multi-layer boards.  
Attempting to create a workstation design without the use of  
multi-layer boards would be adventurous to say the least, the  
issue would more likely be whether to place the interconnect  
on the surface or between layers. The between layer approach  
would work better from an EMI standpoint, but would be more  
difficult to lay out. A stripline is shown below:  
Output Circuitry  
The dot clock signals CLK and CLK- are typically the highest  
frequency signals present in the workstation. To minimize  
problems with EMI, crosstalk, and capacitive loading extra  
care should be taken in laying out this area of the PC board.  
The ICS1572is packagedina 0.3”-wide20-pinSOICpackage.  
This permits the clock generator, crystal, and related compo-  
nents to be laid out in an area the size of a postage stamp. The  
ICS1572 should be placed as close as possible to the RAM-  
DAC. The CLK and CLK- pins are running at VHF frequen-  
cies; one should minimize the length of PCB trace connecting  
them to the RAMDAC so that they don’t become radiators of  
RF energy.  
At the frequencies that the ICS1572 is capable of, PC board  
traces may be long enough to be a significant portion of a  
wavelength of that frequency. PC traces for CLK and CLK-  
should betreated as transmissionlines, notjust interconnecting  
wires. These lines can take two forms: microstrip and stripline.  
A microstrip line is shown below:  
Using 1oz. copper (0.0015” thick) and 0.040” thickness G10,  
a 0.010” trace will exhibit a characteristic impedance of 75Ω  
in a stripline configuration.  
Typically, RAMDACS require a Vih of VAA-1.0 Volts as a  
guaranteed logical “1” and a Vil of VAA-1.6 as a guaranteed  
logical “0.” Worst case input capacitance is 10 pF.  
Output circuitry for the ICS1572 is shown in the following  
diagram. It consists of a 4/1 current mirror, and two open drain  
output FETs along with inverting buffers to alternately enable  
each current-sinking driver. Both CLK and CLK- outputs are  
connected to the respective CLOCK and CLOCK* inputs of  
the RAMDAC with transmission lines and terminated in their  
equivalent impedances by the Thevenin equivalent impedances  
of R1 and R2 or R1and R2’.  
Essentially, the microstrip is a copper trace on a PCB over a  
ground plane. Typically, the dielectric is G10 glass epoxy. It  
differs from a standard PCB trace in that its width is calculated  
to have a characteristic impedance. To calculate the charac-  
teristic impedance ofa microstriplineonemustknow thewidth  
and thickness of the trace, and the thickness and dielectric  
constant of the dielectric. For G10 glass epoxy, the dielectric  
constant (er) is about 5. Propagation delay is strictly a function  
of dielectricconstant. For G10propagation, delay is calculated  
to be 1.77 ns/ft.  
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