IC61LV6432
READ CYCLE SWITCHING CHARACTERISTICS (Over Operating Range) (Continued)
-5
-6
-7
-8
Symbol
Parameter
Cycle Time
Clock High Time
Clock Low Time
Min. Max.
Min. Max.
Min. Max. Min. Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
KC
KH
KL
10
3.5
3.5
—
—
—
—
5
12
4
4
—
—
—
6
13
6
6
—
2
0
—
—
—
7
—
—
6
15
6
6
—
2
0
—
—
—
8
—
—
6
KQ
KQX
Clock Access Time
—
(1)
Clock High to Output Invalid
Clock High to Output Low-Z
Clock High to Output High-Z
Output Enable to Output Valid
Output Disable to Output Invalid
Output Enable to Output Low-Z
Output Disable to Output High-Z
Address Setup Time
Address Status Setup Time
Write Setup Time
Chip Enable Setup Time
Address Advance Setup Time
Address Hold Time
1.5
0
1.5
—
—
—
6
1.5
0
1.5
—
—
—
6
(1,2)
(1,2)
KQLZ
KQHZ
OEQ
2
2
5
6
—
0
0
6
—
0
0
6
(1)
OEQX
0
0
—
—
—
4
0
0
—
—
—
5
—
—
6
—
—
6
(1,2)
OELZ
(1,2)
OEHZ
AS
—
2.5
2.5
2.5
2.5
2.5
0.5
0.5
0.5
0.5
0.5
66.7
—
2.5
2.5
2.5
2.5
2.5
0.5
0.5
0.5
0.5
0.5
80
2.5
2.5
2.5
2.5
2.5
0.5
0.5
0.5
0.5
0.5
35
—
—
—
—
—
—
—
—
—
—
—
2.5
2.5
2.5
2.5
2.5
0.5
0.5
0.5
0.5
0.5
45
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SS
WS
CES
AVS
AH
SH
Address Status Hold Time
Write Hold Time
Chip Enable Hold Time
Address Advance Hold Time
Configuration Setup
WH
CEH
AVH
(3)
CFG
Notes:
1. Guaranteed but not 100% tested. This parameter is periodically sampled.
2. Tested with load in Figure 2.
3. Configuration signal MODE is static and must not change during normal operation.
10
Integrated Circuit Solution Inc.
SSR005-0A 002/02/2004
ICSI [ INTEGRATED CIRCUIT SOLUTION INC ]
