Integrated
Circuit
Systems, Inc.
ICS840002I
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
LVCMOS/LVTTL F
REQUENCY
S
YNTHESIZER
Test Conditions
F_SEL[1:0] = 00
F_SEL[1:0] = 01
F_SEL[1:0] = 10
F_SEL[1:0] = 11
Minimum
186.67
140
93.33
46.67
Typical
Maximum
226.67
170
113.33
56.67
12
212.5MHz @ Integration Range:
637KHz - 10MHz
159.375MHz @ Integration Range:
637KHz - 10MHz
156.25MHz @ Integration Range:
1.875MHz - 20MHz
106.25MHz @ Integration Range:
637KHz - 10MHz
53.125MHz @ Integration Range:
637KHz - 10MHz
20% to 80%
0.78
0.67
0.69
0.82
0.75
200
700
54
58
Units
MHz
MHz
MHz
MH z
ps
ps
ps
ps
ps
ps
ps
%
%
T
ABLE
6C. AC C
HARACTERISTICS
,
V
DD
= V
DDA
= V
DDO
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
Parameter
f
OUT
Output Frequency Range
t
sk(o)
Output Skew; NOTE 1, 3
t
jit(Ø)
RMS Phase Jitter (Random);
NOTE 2
t
R
/ t
F
odc
Output Rise/Fall Time
Output Duty Cycle
F_SEL[1:0]
≠
00
46
F_SEL[1:0] = 00
42
NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions.
Measured at V
DDO
/2.
NOTE 2: Please refer to the Phase Noise Plot.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
840002AGI
www.icst.com/products/hiperclocks.html
6
REV. A MARCH 10, 2005
ICS [ INTEGRATED CIRCUIT SYSTEMS ]
