PRELIMINARY INFORMATION
ICS1726-11
Low EMI Clock Generator
Package Outline and Package Dimensions (8-pin TSSOP)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Inches
Max
8
Symbol
Min
--
Max
1.20
0.15
1.05
0.30
0.20
3.10
Min
--
A
A1
A2
b
0.047
0.006
0.041
0.012
0.05
0.80
0.19
0.09
2.90
0.002
0.032
0.007
E1
E
INDEX
AREA
C
0.0035 0.008
0.114 0.122
0.252 BASIC
0.169 0.177
0.0256 Basic
D
E
E1
e
6.40 BASIC
4.30 4.50
0.65 Basic
1
2
L
α
0.45
0°
0.75
8°
0.018
0°
0.030
8°
D
aaa
-
0.10
-
0.004
A
2
A
A
1
c
- C -
e
SEATING
PLANE
b
L
aaa
C
MDS 1726-11 A
6
Revision 092905
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com