欢迎访问ic37.com |
会员登录 免费注册
发布采购

X24012S 参数 Datasheet PDF下载

X24012S图片预览
型号: X24012S
PDF下载: 下载PDF文件 查看货源
内容描述: 串行E2PROM [Serial E2PROM]
分类和应用: 可编程只读存储器
文件页数/大小: 14 页 / 271 K
品牌: ICMIC [ IC MICROSYSTEMS ]
 浏览型号X24012S的Datasheet PDF文件第2页浏览型号X24012S的Datasheet PDF文件第3页浏览型号X24012S的Datasheet PDF文件第4页浏览型号X24012S的Datasheet PDF文件第5页浏览型号X24012S的Datasheet PDF文件第6页浏览型号X24012S的Datasheet PDF文件第7页浏览型号X24012S的Datasheet PDF文件第8页浏览型号X24012S的Datasheet PDF文件第9页  
TM  
This X24012 device has been acquired by  
IC MICROSYSTEMS from Xicor, Inc.  
ICmic  
128 x 8 Bit  
IC MICROSYSTEMS  
1K  
X24012  
Serial E2PROM  
FEATURES  
DESCRIPTION  
The X24012 is a CMOS 1024 bit serial E2PROM,  
internally organized as one 128 x 8 bank. The X24012  
2.7 to 5.5V Power Supply  
Low Power CMOS  
—Active Current Less Than 1 mA  
features a serial interface and software protocol allowing  
operation on a simple two wire bus. Three address  
—Standby Current Less Than 50 A  
Internally Organized 128 x 8  
Self Timed Write Cycle  
—Typical Write Cycle Time of 5 ms  
inputs allow up to eight devices to share a common two wire  
bus.  
Xicor E2PROMs are designed and tested for applications  
requiring extended endurance. Inherent data retention  
2 Wire Serial Interface  
—Bidirectional Data Transfer Protocol  
Four Byte Page Write Operation  
—Minimizes Total Write Time Per Byte  
High Reliability  
is greater than 100 years. The X24012 is available in eight  
pin DIP and SOIC packages.  
—Endurance: 100,000 Cycles  
—Data Retention: 100 Years  
FUNCTIONAL DIAGRAM  
(8)  
(4)  
V
V
CC  
SS  
H.V. GENERATION  
TIMING  
START CYCLE  
& CONTROL  
(5) SDA  
START  
STOP  
LOGIC  
CONTROL  
LOGIC  
SLAVE ADDRESS  
REGISTER  
2
E PROM  
32 X 32  
XDEC  
LOAD  
WORD  
INC  
(6) SCL  
(3) A  
+COMPARATOR  
2
ADDRESS  
COUNTER  
(2) A  
(1) A  
1
0
R/W  
YDEC  
8
CK  
D
OUT  
PIN  
DATA REGISTER  
D
OUT  
ACK  
3847 FHD F01  
© Xicor, 1991 Patents Pending  
3847-1  
Characteristics subject to change without notice  
1