nar y
iC-TW8
16-BIT SIN/COS INTERPOLATOR
limi
pre
WITH AUTO-CALIBRATION
Rev A2, Page 9/12
ELECTRICAL CHARACTERISTICS
Operating conditions: AVDD = DVDD = 3.1...5.5 V, Tj = -40...+125 °C, reference point AVSS unless otherwise stated
Item
No.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Digital Input Pins:
EESEL, CALIB, CLOCK, IR, FRAME, SPI_SI, SPI_SCLK, SPI_xSS, PINSEL, SCL, SDA, C0, C1, C2, C3, FAB
701 Vt()hi
Input Logic Threshold High
DVDD = 5 V
DVDD = 3.3 V
702 Vt()lo
Input Logic Threshold Low
DVDD = 5 V
0.8
DVDD = 3.3 V
0.8
703
704
705
706
707
708
Vhys()
Ilk()
Rpu()
Rpu()
Rpd()
Rpd()
Input Hysteresis at
CALIB, SPI_SCLK
Input Leakage Current at
SPI_SI, SPI_SCLK, SPI_xSS
Pull-Up Resistor at IR
Pull-Up Resistor at
CALIB, SCL, SDA
Pull-Down Resistor at EESEL,
CLOCK, FRAME, PINSEL
Pull-Down Resistor at FAB
150
10
150
5
0.15
2.2
2.2
V
V
V
V
0.75
±50
%DVDD
nA
kΩ
kΩ
kΩ
kΩ
Digital Output Pins:
CLOCK, FRAME, SPI_SO, OUTA, OUTB, OUTZ, STATUS, FAULT, SDA, WP
801 Vs()hi
Output Voltage High
DVDD = 5 V, IOUT = 4 mA
DVDD = 3.3 V, IOUT = 4 mA
802 Vs()lo
Output Voltage Low
DVDD = 5 V, IOUT = -4 mA
DVDD = 3.3 V, IOUT = -4 mA
803
804
805
806
Idc()max
Idcmax
tr()
tf()
Permissible Output DC Load
Permissible Total Output DC
Load
Rise Time
Fall Time
per pin
for all output pins in aggregate
DVDD = 5 V, CL = 50 pF
DVDD = 3.3 V, CL = 50 pF
DVDD = 5 V, CL = 50 pF
DVDD = 3.3 V, CL = 50 pF
I(VREF) = 0
4.5
2.8
0.3
0.3
±10
±60
50
30
50
30
50
-1
V
V
mV
mV
mA
mA
ns
ns
ns
ns
%VDD
V
Bias Outputs: VC, VREF
901
902
VC
dVREF
Bias Voltage at VC
Bias Voltage at VREF versus VC dVREF = V(VREF) - V(VC); VC I(VREF) = 0
actual
converter
INL: The maximum absolute error.
DNL: the maximum step
between two consecutive
samples.
tAB
tMTD
converter
error
B
A
twhi
AArel
T
AArel
ideal converter
0
180
360
angular position
Figure 1: Description of AB output signals.
Figure 2: Definition of integral and differential nonlin-
earity.
ICHAUS [ IC-HAUS GMBH ]
