iC-TW8 16-BIT SIN/COS INTERPOLATOR
WITH AUTO-CALIBRATION
Rev A2, Page 9/12
ELECTRICAL CHARACTERISTICS
Operating conditions: AVDD = DVDD = 3.1...5.5 V, Tj = -40...+125 °C, reference point AVSS unless otherwise stated
Item Symbol
No.
Parameter
Conditions
Unit
Min.
Typ.
Max.
Digital Input Pins:
EESEL, CALIB, CLOCK, IR, FRAME, SPI_SI, SPI_SCLK, SPI_xSS, PINSEL, SCL, SDA, C0, C1, C2, C3, FAB
701
702
Vt()hi
Input Logic Threshold High
DVDD = 5 V
DVDD = 3.3 V
2.2
2.2
V
V
Vt()lo
Input Logic Threshold Low
DVDD = 5 V
DVDD = 3.3 V
0.8
0.8
V
V
703 Vhys()
704 Ilk()
Input Hysteresis at
CALIB, SPI_SCLK
0.15
0.75 %DVDD
Input Leakage Current at
±50
nA
SPI_SI, SPI_SCLK, SPI_xSS
705 Rpu()
706 Rpu()
Pull-Up Resistor at IR
150
10
kΩ
kΩ
Pull-Up Resistor at
CALIB, SCL, SDA
707 Rpd()
708 Rpd()
Pull-Down Resistor at EESEL,
CLOCK, FRAME, PINSEL
150
5
kΩ
kΩ
Pull-Down Resistor at FAB
Digital Output Pins:
CLOCK, FRAME, SPI_SO, OUTA, OUTB, OUTZ, STATUS, FAULT, SDA, WP
801
Vs()hi
Output Voltage High
DVDD = 5 V, IOUT = 4 mA
DVDD = 3.3 V, IOUT = 4 mA
4.5
2.8
V
V
802
Vs()lo
Output Voltage Low
DVDD = 5 V, IOUT = -4 mA
DVDD = 3.3 V, IOUT = -4 mA
0.3
0.3
mV
mV
803 Idc()max
804 Idcmax
Permissible Output DC Load
per pin
±10
±60
mA
mA
Permissible Total Output DC
Load
for all output pins in aggregate
805
806
tr()
tf()
Rise Time
DVDD = 5 V, CL = 50 pF
DVDD = 3.3 V, CL = 50 pF
50
30
ns
ns
Fall Time
DVDD = 5 V, CL = 50 pF
DVDD = 3.3 V, CL = 50 pF
50
30
ns
ns
Bias Outputs: VC, VREF
901 VC
Bias Voltage at VC
I(VREF) = 0
50
-1
%VDD
V
902 dVREF
Bias Voltage at VREF versus VC dVREF = V(VREF) - V(VC); VC I(VREF) = 0
INL: The maximum absolute error.
DNL: the maximum step
actual
converter
t
t
MTD
AB
converter
error
between two consecutive
samples.
B
A
t
whi
AArel
AArel
ideal converter
0
180
360
T
angular position
Figure 1: Description of AB output signals.
Figure 2: Definition of integral and differential nonlin-
earity.
ICHAUS [ IC-HAUS GMBH ]
