iC-NQL
13-bit Sin/D CONVERTER WITH SSI INTERFACE
Rev B1, Page 20/24
Examples of SSI Data Output Formats
Output Formats SSI
13-bit SSI
Res
Mode Error CRC T1 T2 T3 T4... T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T23 T24 T25
10 bit SSI
X
-
S9 S8 S7 S6 ... S0 E1 E0
0
0
Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop
Example
-
0
0
0
0
0
0
0
0
0
0
0
0
13 bit SSI
-
S12 S11 S10 S9 ... S3 S2 S1 S0 Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop Stop
*1
Example
-
0
0
0
0
0
0
0
0
0
0
0
0
SSI-R
-
S12 S11 S10 S9 ... S3 S2 S1 S0 Stop S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2
*2
Example
0
25-bit SSI
13 bit SSI
X
X
-
S12 S11 S10 S9 ... S3 S2 S1 S0 E1 E0
0
0
Stop Stop Stop Stop Stop Stop Stop Stop Stop
Example
-
0
0
0
0
0
0
0
0
0
0
8 + 13 SSI
bit*3
P7 P6 P5 P4 ... P0, S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0 E1 E0
S12, S11
Stop
Example
0
0
Configuration M2S = 0x00, CFGSSI = 0x00, unless otherwise noted.
*1) CFGSSI = 0x01; *2) CFGSSI = 0x03; *3) M2S = 0x01
Legend SSI = SSI Protocol
SSI-R = SSI Ring Register operation
Table 35: Output Formats SSI
Cycle
CLK
P7
P0 S12
S0 Stop P7
LSB MSB
P0 S12
S0 Stop
LSB
DATA
MSB
LSB MSB
LSB MSB
Latch
Timeout
Figure 16: 25-bit SSI output format during ring register operation. The example displays the transmission
of a 13-bit angle value headed by period counter data of 8-bit; error messages are switched off
herein (SELRES = 0x03, M2S = 0x01, CFGSSI = 0x03)
EEPROM INTERFACE
Serial EEPROM components permitting operation area of bytes 0 to 15 is mapped onto iC-NQL’s regis-
from 3.3 V to 5 V can be connected (such as 24C02, for ters.
example). When the device is switched on the memory
ICHAUS [ IC-HAUS GMBH ]
