iC-NQL
13-bit Sin/D CONVERTER WITH SSI INTERFACE
Rev B1, Page 2/24
DESCRIPTION
iC-NQL is a monolithic A/D converter which, by ap- rectly connected without the need for external resis-
plying a count-safe vector follower principle, converts tors. Various programmable D/A converters are avail-
sine/cosine sensor signals with a selectable resolu- able for the conditioning of sine/cosine sensor sig-
tion and hysteresis into angle position data. This nals with regard to offset, amplitude ratio and phase
absolute value is output via a synchronous-serial errors. Front-end gain can be set in stages graded
SSI interface and trails a master clock rate of up to to suit all common differential sensor signals from
4 Mbit/s. A 8-bit period counter supplements the po- approximately 20 mVpp to 1.5 Vpp, and also single-
sition data with a multiturn count.
ended sensor signals from 40 mVpp to 3 Vpp respec-
tively.
At the same time any changes in output data are
converted into incremental A QUAD B encoder sig- The device reads its configuration data via the serial
nals. Here, the minimum transition distance can be EEPROM interface when cycling power, respectively
adapted to suit the system on hand (cable length, ex- following an undervoltage reset. The read in cycle
ternal counter). A synchronised zero index is gener- is repeated up to three times when data correctness
ated and output to Z if enabled by the PZERO and is not confirmed by a CRC validation. A permanent
NZERO inputs.
CRC error as well as the configuration phase itself
is displayed at the error message output NERR by a
The front-end amplifiers are configured as instrumen- low level signal.
tation amplifiers, permitting sensor bridges to be di-