iC-NQI
preliminar y
Rev A2, Page 9/26
13-bit Sin/D CONVERTER WITH CALIBRATION
OPERATING REQUIREMENTS: 2W Interface
Operating Conditions: VDD = 5 V ±10 %, Ta = -25 ... 85 °C; input levels lo = 0 ... 0.45 V, hi = 2.4 V ... VDD
Item
No.
Symbol
Parameter
Conditions
Fig.
Min.
Permissible Clock Period
Clock Signal Hi Level Duration
Clock Signal Lo Level Duration
Permissible Clock Period
Clock Signal Hi Level Duration
Clock Signal Lo Level Duration
Permissible Clock Period
Clock Signal Hi Level Duration
Clock Signal Hi Level Duration
Clock Signal Lo Level Duration
"Logic 0" Hi Level Duration
"Logic 1" Hi Level Duration
read out of register data
CFGTOR selected in accordance with
table 31
CFGTOS selected in accordance with
table 31
CFGTOS = 0x01
4
4
4
5, 6
5, 6
5, 6
7
7
7
7
7
7
10
70
30
250
25
25
100
25
25
4
t
tor
70
indefinite
30
90
%
TCLK
%
TCLK
Max.
2x t
tos
t
tos
t
tos
2x t
tos
t
tos
t
tos
ns
ns
ns
ns
ns
ns
µs
ns
%
TCLK
Unit
Serial Data Output: SSI (Pin NPRG = hi, SELSSI = 1)
I001 T
CLK
I002 t
CLKh
I003 t
CLKl
I004 T
CLK
I005 t
CLKh
I006 t
CLKl
I007 T
CLK
I008 t
CLKh
I009 t
CLKh
I010 t
CLKl
I011 t
CLK0h
I012 t
CLK1h
Serial Data Output: BiSS B, BiSS C unidir. (Pin NPRG = hi, SELSSI = 0, BiSSMOD = 0 resp. 1)
Bidirectional Register Communication (pin NPRG = lo)
Figure 4: Serial SSI data output (NPRG = hi).
Figure 5: Serial BiSS B data output (NPRG = hi).
Figure 6: Serial BiSS C unidir. data output (NPRG = hi).
Figure 7: Bidirectional register communication (NPRG = lo).
ICHAUS [ IC-HAUS GMBH ]
