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IC-NQI 参数 Datasheet PDF下载

IC-NQI图片预览
型号: IC-NQI
PDF下载: 下载PDF文件 查看货源
内容描述: 校准13位仙/ D转换器 [13-bit Sin/D CONVERTER WITH CALIBRATION]
分类和应用: 转换器
文件页数/大小: 26 页 / 1116 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-NQI
preliminar y
Rev A2, Page 2/26
13-bit Sin/D CONVERTER WITH CALIBRATION
DESCRIPTION
iC-NQI is a monolithic A/D converter which, by ap-
plying a count-safe vector follower principle, converts
sine/cosine sensor signals with a selectable resolu-
tion and hysteresis into angle position data.
The front-end amplifiers are configured as instrumen-
tation amplifiers, permitting sensor bridges to be di-
rectly connected without the need for external resis-
tors. Various programmable D/A converters are avail-
able for the conditioning of sine/cosine sensor signals
with regard to offset, amplitude ratio and phase er-
rors. Front-end gain can be set in stages graded to
suit all common differential sensor signals from ap-
proximately 20 mVpp to 1.5 Vpp, and also single-end
sensor signals from 40 mVpp to 3 Vpp respectively.
Two serial interfaces have been included to permit
configuration of the device: I
2
C for the connection of
an EEPROM and a 2-wire interface for configuration
from a microcontroller. A low signal at pin NPRG is
required to release the 2-wire interface for program-
ming, whereas a high signal at pin NPRG preselects
the serial output of measurement data.
For measurement data output, the fast synchronous-
serial 2-wire interface can follow an SSI protocol
at clock rates of up to 4 Mbit/s, or a BiSS unidi-
rectional protocol featuring error messages and a
CRC-protected transmission at clock rates of up to
10 Mbit/s. A configurable period counter can supple-
ment the measurement data by a multiturn count of
up to 24 bits.
At the same time any changes in output data are
converted into incremental A QUAD B encoder sig-
nals. Here, the minimum transition distance can be
adapted to suit the system on hand (limitations due
to counter input frequency, cable length, EMI). A syn-
chronized index signal is generated and output to Z if
enabled by the PZERO and NZERO inputs.
If the EEPROM is detected following a power-down
reset, the CRC-protected chip setup is read in auto-
matically.