iC-NQ
13-bit Sin/D CONVERTER WITH CALIBRATION
Rev D1, Page 18/25
TEST FUNCTIONS
TMODE
Code
0x00
Adr 0x06, Bit 3:1
Signal at Z
Z
TMA
Code
0x00
0x01
Notes
Adr 0x06, Bit 0
Description
Pin A
A
Pin B
Pin SDA
SDA
Pin SCL
SCL
no test mode
B
0x01
A xor B
Output A EXOR B
iC-Haus device test
iC-Haus device test
iC-Haus device test
iC-Haus device test
iC-Haus device test
iC-Haus device test
COS+
COS-
SIN+
SIN-
0x02
ENCLK
To permit the verification of GAIN and OFFSET
settings, the input amplifier outputs are available at
the pins. To operate the converter a signal of 4 Vpp
is the ideal here and should not be exceeded. Pin
loads above 1 MΩ are adviceable for accurate
measurements.
0x03
NLOCK
0x04
CLK
0x05
DIVC
0x06
PZERO - NZERO
TP
0x07
Table 30: Analog Test Mode
Condition
CFGABZ = 0x00
Table 29: Test Mode
Parameter GAIN ideally adjusts the signal levels to ca.
4 Vpp and should not be touched afterwards.
5 V
A: COS+
Both scope display modes are feasible for OFFS (pos-
itive values) or RATIO adjustments; regarding the ad-
justment of PHASE the X/Y mode may be preferred.
SDA: Sin+
For OFFS adjustment towards negative values the test
signals COS- (pin B) and SIN- (pin SCL) are relevant.
0 V
Y/T 1 V/Div vert.
1 V/Div vert. 1 V/Div hor.
X/Y
Figure 17: Calibrated signals with TMA mode.
ICHAUS [ IC-HAUS GMBH ]
