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IC-MSB2EVALMSB1D 参数 Datasheet PDF下载

IC-MSB2EVALMSB1D图片预览
型号: IC-MSB2EVALMSB1D
PDF下载: 下载PDF文件 查看货源
内容描述: SIN / COS信号调理与1Vpp典型DRIVER [SIN/COS SIGNAL CONDITIONER WITH 1Vpp DRIVER]
分类和应用: 驱动
文件页数/大小: 29 页 / 584 K
品牌: ICHAUS [ IC-HAUS GMBH ]
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iC-MSBSAFETY, iC-MSB2  
SIN/COS SIGNAL CONDITIONER WITH 1Vpp DRIVER  
Rev D2, Page 18/29  
INPUT CONFIGURATIONS  
RIN12  
RIN0  
Code  
–000  
–010  
–100  
–110  
1—1  
0—1  
Adr 0x0E, bit 3:0  
Input Configurations  
Adr 0x13, bit 3:0  
All input stages are configured as instrumentation am-  
plifiers and thus directly suitable for differential input  
signals. Referenced input signals can be processed as  
an option; in this mode input X2 acts as a reference.  
Nominal Rin() Intern Rui()  
I/V Mode  
1.7 kΩ  
2.5 kΩ  
3.5 kΩ  
4.9 kΩ  
20 kΩ  
1.6 kΩ  
2.3 kΩ  
3.2 kΩ  
4.6 kΩ  
5 kΩ  
current input  
current input  
current input  
current input  
voltage input  
voltage input  
INMODE  
Adr 0x03, bit 2  
Code  
0
Function  
high  
impedance  
1 MΩ  
Differential input signals  
Single-ended input signals *  
* Input X2 is reference for all inputs.  
1
Note  
Table 18: I/V Mode and Input Resistance  
Table 17: Input Signal Mode  
BIAS12  
BIAS0  
Code  
0
Adr 0x0E, bit 6  
Adr 0x13, bit 6  
VREFin()  
2.5 V)  
Both current and voltage signals can be processed as  
input signals, selected using RIN12(0) and RIN0(0).  
In I Mode an input resistor Rin() becomes active at  
each input pin, converting the current signal into a volt-  
age signal. Input resistance Rin() consists of a pad  
wiring resistor and resistor Rui() which is linked to the  
adjustable bias voltage source VREFin(). The follow-  
ing table shows the possible selections, with Rin() giv-  
ing the typical resulting input resistance (see Electri-  
cal Characteristics for tolerances). The input resistor  
should be set in such a way that intermediate poten-  
tials VDC1 and VDC2 lie between 125 mV and 250 mV  
(verifiable in Calibration Mode 2).  
Type of sensor  
Lowside sink current (I Mode)  
Highside current source (I Mode)  
1
1.5 V)  
Table 19: Reference Voltage  
BIASEX  
Code  
0-  
Adr 0x0D, bit 7:6  
VREFin()  
internal  
Signal at X2  
Neg. Zero Signal (Index -), input  
Ref. Voltage VREFin12, output  
Ref. Voltage VREFin, input  
10  
internal *  
external *  
11  
Note  
*) The voltage at X2 is reference for all inputs.  
In V Mode an optional voltage divider can be selected  
which reduces unacceptably large input amplitudes to  
ca. 25%. The circuitry is equivalent to the resistor  
chain in I Mode; the pad wiring resistor is considerably  
larger here, however.  
Table 20: Input Reference Selection  
Figure 2: Input instrumentation amplifier and signal conditioning  
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