iC-MSBSAFETY, iC-MSB2
SIN/COS SIGNAL CONDITIONER WITH 1Vpp DRIVER
Rev D2, Page 13/29
SERIAL CONFIGURATION INTERFACE (EEPROM)
The serial configuration interface consists of the two Example of CRC Calculation Routine
pins SCL and SDA and enables read and write access
to an EEPROM with I2C interface. The readout speed
can be adjusted using register bit ENFAST.
unsigned char ucDataStream
int iCRCPoly 0x11D ;
unsigned char ucCRC=0;
int 0;
= 0;
=
i
=
ENFAST
Code
0
Adr 0x00, bit 7
ucCRC = 1; / / s t a r t value ! ! !
Function
for ( iReg
= 0; iReg <31; iReg ++)
{
Regular clock rate, f(SCL) approx. 80 kHz
High clock rate, f(SCL) approx. 320 kHz
ucDataStream
for ( i =0; i <=7; i ++)
i f ( (ucCRC & 0x80 ) != ( ucDataStream & 0x80 ) )
ucCRC = (ucCRC << 1) iCRCPoly ;
else
ucCRC = (ucCRC << 1 ) ;
ucDataStream ucDataStream << 1;
= ucGetValue ( iReg ) ;
1
{
Notes
For in-circuit programming bus lines SCL and SDA
require pull-up resistors.
For line capacitances to 170 pF, adequate values
are:
4.7 kΩ with clock frequency 80 kHz
2 kΩ with clock frequency 320 kHz
^
=
}
}
The pull-up resistors may not be less than 1.5 kΩ.
To separate the signals a ground line between SCL
and SDA is recommended.
iC-MSB requires a supply voltage during EEPROM
programming (5 V to VDD).
EEPROM Selection
The following minimal requirements must be fulfilled:
• Operation from 3.3 to 5 V, I2C interface
Table 5: Config. Interface Clock Frequency
• Minimal 512 bit, 64x8
Once the supply has been switched on (power down
reset) the iC-MSB outputs are high impedance (tris-
tate) until a valid configuration is read out from the
EEPROM using device ID 0x50.
(address range used is 0x00 to 0x3F)
• Support of Page Write with Pages of at least 4
bytes. Otherwise error events can not be saved
to the EEPROM (EMASKE(9:0) = 0x000).
Bit errors in the 0x00 to 0x1E memory section are
pinpointed by the CRC deposited in register CHK-
SUM(7:0) (address 0x1F; the CRC polynomial used is
"1 0001 1101").
• Device ID 0x50 "1010 000", no occupation of
0x55 (A2...A0 = 0). Otherwise iC-MSB is not ac-
cessible in I2C slave mode via 0x55 (ENSL = 0).
Device recommendation: Atmel AT24C01B, 128x8
Should no valid configuration data being available (in-
correct CRC value or EEPROM missing), the readin
process is repeated; the system aborts following a
fourth faulty attempt and iC-MSB switches to I2C slave
mode.
For devices loading valid configuration data from the
EEPROM, the register bit ENSL decides for enabling
the I2C slave function.
ENSL
Code
0
Adr 0x17, bit 3
Function
Normal operation
1
I2C Slave Mode Enable (Device ID 0x55)
Table 6: Config. Interface Mode
The device ID for the EEPROM can be entered in reg-
ister DEVID(6:0) (address 0x00), from which iC-MSB
will take its configuration after exiting test mode (see
page 17). The DEVID(6:0) stored therein is then ac-
cepted.
ICHAUS [ IC-HAUS GMBH ]
